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RE: I2C issues on SLX45 ยป fpga_i2c.c

Conor O, 02/27/2013 08:01 AM

 
1
/*
2
 * i2c.c
3
 *
4
 *  Created on: Apr 20, 2010
5
 *      Author: Mike Williamson
6
 */
7

    
8
#include "common/fpga/fpga_i2c.h"
9
#include "common/fpga/core_ids.h"
10
#include "fpga.h"
11

    
12
#include <linux/kernel.h>
13
#include <linux/delay.h>
14
#include <linux/module.h>
15
#include <linux/slab.h>
16
#include <linux/device.h>
17
#include <linux/i2c.h>
18

    
19
MODULE_LICENSE("GPL");
20
MODULE_AUTHOR("Mike Williamson <michael.williamson@criticallink.com");
21
MODULE_DESCRIPTION("Driver for MityDSP-L138 FPGA Based I2C Interface");
22

    
23
/**
24
 *  this is the device driver specific parameters tied to each i2c device in the system
25
 *  (the object data)
26
 */
27
struct fpga_i2c {
28
	struct i2c_adapter adapter;
29
};
30

    
31
/*
32
 * Low level master read/write transaction. This function is called
33
 * from i2c_xfer.
34
 *
35
 * \param[in] adap pointer to our adaptor device
36
 * \param[in] msg message to send
37
 * \param[in] stop true if this is the last message in a set
38
 *
39
 * \return number of bytes transmitted, or < 0 error condition
40
 */
41
static int
42
fpga_i2c_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
43
{
44
	int i, slp_cnt;
45
	tuI2cCSR CSR;
46
	tuI2cSAR SAR;
47
	unsigned short  *lpBaseReg;
48
	struct device *dev;
49
	struct fpga_i2c *driver_data;
50
	struct fpga_device* fpgadev;
51

    
52
	dev = i2c_get_adapdata(adap);
53
	fpgadev = to_fpga_device(dev);
54
	driver_data = dev_get_drvdata(dev);
55
	lpBaseReg = (unsigned short*)fpgadev->baseaddr;
56

    
57
	dev_dbg(dev, "Msg Transfer - R/W = %d, len = %d\n", msg->flags & I2C_M_RD ? 1 : 0, msg->len);
58

    
59
	/* Can't handle 10 bit addresses yet */
60
	if (msg->flags & I2C_M_TEN)
61
	{
62
		dev_err(dev, "Msg Transfer 10 Bit Address Requested\n");
63
		return -EIO;
64
	}
65

    
66
	if (msg->len > FPGA_I2C_FIFO_DEPTH)
67
	{
68
		dev_err(dev, "Msg Transfer Message Length too big, %d\n", msg->len);
69
		return -EIO;
70
	}
71

    
72
	SAR.mnWord = 0;
73
	SAR.msBits.mnSlaveAddr = msg->addr;
74

    
75
	lpBaseReg[gnSAR_OFFSET] = SAR.mnWord;
76

    
77
	lpBaseReg[gnCNT_OFFSET] = msg->len;
78

    
79
	slp_cnt = 0;
80

    
81
	/** TODO - if transfer length is > 32 we need to
82
	 *  loop in multiples of 32 (without setting stop)
83
	 *  until we're done...
84
	 */
85
	if (msg->flags & I2C_M_RD)
86
	{
87
		/* Handle Bus Read */
88
		CSR.mnWord = 0;
89
		CSR.msBits.mbFifoReset = 1;
90
		lpBaseReg[gnCSR_OFFSET] = CSR.mnWord;
91
		wmb();
92

    
93
		CSR.mnWord = 0;
94
		CSR.msBits.mb10Bit = 0;
95
		CSR.msBits.mbRnW = 1;
96
		CSR.msBits.mbStop = stop;
97
		CSR.msBits.mbDone = 1;
98
		CSR.msBits.mbGo = 1;
99
		lpBaseReg[gnCSR_OFFSET] = CSR.mnWord;
100
		wmb();
101

    
102
		/* wait until done */
103
		CSR.mnWord = lpBaseReg[gnCSR_OFFSET];
104

    
105
		while (!CSR.msBits.mbDone) {
106
			msleep(1);
107
			rmb();
108
			CSR.mnWord = lpBaseReg[gnCSR_OFFSET];
109
			if (++slp_cnt > 250)
110
				break;
111
		};
112

    
113
		if (slp_cnt > 250) {
114
			dev_dbg(dev, "Timeout on write request\n");
115
			return -EIO;
116
		}
117

    
118
		/* go fetch the data */
119
		for (i = 0; i < msg->len; i++)
120
		{
121
			tuI2cFDR DataReg;
122
			DataReg.mnWord = lpBaseReg[gnFDR_OFFSET];
123
			msg->buf[i] = DataReg.msBits.mnData;
124
			rmb();
125
		}
126

    
127
	}
128
	else
129
	{
130
		/* clear the buffers */
131
		dev_dbg(dev, "Loading buffer with %d bytes\n", msg->len);
132

    
133
		CSR.mnWord = 0;
134
		CSR.msBits.mbFifoReset = 1;
135
		lpBaseReg[gnCSR_OFFSET] = CSR.mnWord;
136
		wmb();
137

    
138
		CSR.msBits.mbFifoReset = 0;
139
		lpBaseReg[gnCSR_OFFSET] = CSR.mnWord;
140
		wmb();
141

    
142
		/* load the buffer */
143
		for (i = 0; i < msg->len; i++)
144
		{
145
			tuI2cFDR DataReg;
146
			DataReg.mnWord = 0;
147
			DataReg.msBits.mnData = msg->buf[i];
148
			lpBaseReg[gnFDR_OFFSET] = DataReg.mnWord;
149
			wmb();
150
		}
151

    
152
		/* Handle Bus Write */
153
		CSR.mnWord = 0;
154
		CSR.msBits.mb10Bit = 0;
155
		CSR.msBits.mbRnW = 0;
156
		CSR.msBits.mbStop = stop;
157
		CSR.msBits.mbDone = 1;
158
		CSR.msBits.mbGo = 1;
159
		lpBaseReg[gnCSR_OFFSET] = CSR.mnWord;
160
		wmb();
161

    
162
		/* wait until done */
163
		CSR.mnWord = lpBaseReg[gnCSR_OFFSET];
164

    
165
		while (!CSR.msBits.mbDone) {
166
			msleep(1);
167
			rmb();
168
			CSR.mnWord = lpBaseReg[gnCSR_OFFSET];
169
			if (++slp_cnt > 250)
170
				break;
171
		};
172

    
173
		if (slp_cnt > 250) {
174
			dev_dbg(dev, "Timeout on write request\n");
175
			return -EIO;
176
		}
177
	}
178

    
179
	/** check status for ack errors, etc. */
180
	CSR.mnWord = lpBaseReg[gnCSR_OFFSET];
181
	if (CSR.msBits.mbAckErr) {
182
		dev_dbg(dev, "Ack Error\n");
183
		return -EIO;
184
	}
185

    
186
	dev_dbg(dev, "transfer returning %d\n", msg->len);
187
	return msg->len;
188
}
189

    
190
/*
191
 * Prepare controller for a transaction and call i2c_davinci_xfer_msg
192
 *
193
 * \param[in] adap pointer to our adaptor device
194
 * \param[in] msgs pointer to a list of messages to send
195
 * \param[in] num number of messages to transfer
196
 */
197
static int
198
fpga_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
199
{
200
	struct device *dev = i2c_get_adapdata(adap);
201
	int i;
202
	int ret;
203

    
204
	dev_dbg(dev, "%s: msgs: %d\n", __func__, num);
205

    
206
/*
207
	ret = i2c_wait_bus_not_busy(dev, 1);
208
	if (ret < 0) {
209
		dev_warn(dev->dev, "timeout waiting for bus ready\n");
210
		return ret;
211
	}
212
*/
213

    
214
	for (i = 0; i < num; i++) {
215
		ret = fpga_i2c_xfer_msg(adap, &msgs[i], (i == (num - 1)));
216
		dev_dbg(dev, "%s [%d/%d] ret: %d\n", __func__, i + 1, num, ret);
217
		if (ret < 0)
218
		{
219
			dev_dbg(dev, "Failed to transfer message : %d\n", ret);
220
			return ret;
221
		}
222
	}
223

    
224
	return num;
225
}
226

    
227
static u32 fpga_i2c_func(struct i2c_adapter *adap)
228
{
229
	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
230
}
231

    
232
static struct i2c_algorithm i2c_algo = {
233
	.master_xfer	= fpga_i2c_xfer,
234
	.functionality	= fpga_i2c_func,
235
};
236

    
237
static struct attribute *fpga_i2c_attributes[] = {
238
		/* &dev_attr_pen_down.attr, */
239
		NULL,
240
};
241

    
242
static struct attribute_group fpga_i2c_attr_group = {
243
		.attrs = fpga_i2c_attributes,
244
};
245

    
246
/**
247
 * IRQ handler called when an ADS7843 core is asserting an interrupt
248
 * condition.  This method is called within the context of an ISR, and
249
 * must be atomic.
250
 *
251
 * \param[in] dev the device issuing the interrupt.
252
 * \return 0
253
 */
254
static int fpga_i2c_IrqHandler(struct fpga_device* dev)
255
{
256
	struct i2c     *driver_data;
257
	unsigned short  *lpBaseReg;
258

    
259
	driver_data = dev_get_drvdata(&dev->dev);
260
	lpBaseReg = (unsigned short*)dev->baseaddr;
261

    
262
	/* TODO - interrupts not yet designed into core */
263

    
264
	return 0;
265
}
266

    
267
/**
268
 * This routine is called when a device is removed from the FPGA bus.
269
 *
270
 * \param[in] dev pointer to the device being removed.
271
 */
272
static int fpga_i2c_remove(struct device *dev)
273
{
274
	int rv = 0;
275
	struct fpga_i2c *driver_data;
276
	struct fpga_device* fpgadev = to_fpga_device(dev);
277
	driver_data = dev_get_drvdata(dev);
278

    
279
	dev_dbg(dev, "i2c_remove entered\n");
280

    
281
	i2c_del_adapter(&driver_data->adapter);
282

    
283
	sysfs_remove_group(&dev->kobj, &fpga_i2c_attr_group);
284

    
285
	/* make sure IRQ is disabled */
286
	enable_irq_vec(fpgadev->coreversion.ver0.bits.level,
287
				   fpgadev->coreversion.ver0.bits.vector,
288
				   0);
289

    
290
	kfree(driver_data);
291

    
292
	dev_dbg(dev, "i2c_remove completed\n");
293
	return rv;
294
}
295

    
296
static int fpga_i2c_probe(struct device *dev);
297

    
298
/**
299
 * The driver object.  The information here must be common for
300
 * all of the potential drivers in the system.
301
 */
302
static struct fpga_driver fpga_i2c_driver = {
303
	.id 		= CORE_ID_I2C, /** must match value in core_ids.h */
304
	.version 	= "I2C Driver 1.0",
305
	.IrqHandler 	= fpga_i2c_IrqHandler,
306
	.probe 		= fpga_i2c_probe,
307
	.remove 	= fpga_i2c_remove,
308
	.driver 	= {
309
		.name 	= "fpga_i2c",
310
		.owner 	= THIS_MODULE,
311
	},
312
};
313

    
314
int adapter_number = 2;
315
module_param (adapter_number, int, S_IRUSR | S_IRGRP | S_IROTH);
316
MODULE_PARM_DESC (adapter_number, "The base adaptor number for "
317
		                          "new I2C busses (default 2)");
318

    
319
/**
320
 * The i2c_probe routine is called after the i2c driver is successfully
321
 * matched to an FPGA core with the same core ID.
322
 *
323
 * \param[in] dev device within an fpga_device structure.
324
 * return 0 on successful probe / initialization.
325
 */
326
static int fpga_i2c_probe(struct device *dev)
327
{
328
	int rv = 0;
329
	struct i2c_adapter* adap;
330
	struct fpga_i2c  *driver_data = NULL;
331
	unsigned short     *lpBaseReg = NULL;
332

    
333
	struct fpga_device* fpgadev = to_fpga_device(dev);
334

    
335
	lpBaseReg = (unsigned short*)fpgadev->baseaddr;
336

    
337
	dev_dbg(dev, "i2c_probe() entered\n");
338

    
339
	driver_data = kzalloc(sizeof(struct fpga_i2c), GFP_KERNEL);
340
	if (!driver_data)
341
	{
342
		rv = -ENOMEM;
343
		goto probe_bail;
344
	}
345

    
346
	rv = sysfs_create_group(&dev->kobj, &fpga_i2c_attr_group);
347
	if (rv)
348
	{
349
		dev_err(dev, "i2c_probe() failed to add attributes group - %d\n", rv);
350
		goto probe_bail_free_driver;
351
	}
352

    
353
	dev_set_drvdata(dev, driver_data);
354

    
355
	adap = &driver_data->adapter;
356
	i2c_set_adapdata(adap, dev);
357
	adap->owner = THIS_MODULE;
358
	adap->class = I2C_CLASS_HWMON;
359
	strlcpy(adap->name, "MityDSP FPGA I2C adapter", sizeof(adap->name));
360
	adap->algo = &i2c_algo;
361
	adap->dev.parent = dev;
362
	adap->timeout = FPGA_I2C_TIMEOUT;
363

    
364
	adap->nr = adapter_number++;
365
	rv = i2c_add_numbered_adapter(adap);
366
	if (rv) {
367
		dev_err(dev, "failure adding adapter\n");
368
		goto probe_bail_free_adapt;
369
	}
370

    
371
	/* Set the frequency */
372
	lpBaseReg[gnDIV_OFFSET] = 0xFF; /* TODO! */
373
	wmb();
374

    
375
	enable_irq_vec(fpgadev->coreversion.ver0.bits.level,
376
			       fpgadev->coreversion.ver0.bits.vector,
377
			       1);
378

    
379
	return rv;
380

    
381
probe_bail_free_adapt:
382

    
383

    
384
probe_bail_free_driver:
385
	kfree(driver_data);
386

    
387
probe_bail:
388
	return rv;
389
}
390

    
391
/**
392
 * Called when the module containing this driver is loaded.
393
 */
394
static int __init fpga_i2c_init(void)
395
{
396
	int ret;
397

    
398
	ret = register_fpga_driver(&fpga_i2c_driver);
399
	if (ret)
400
	{
401
		printk(KERN_ALERT "Unable to register i2c_driver\n");
402
		goto exit_bail;
403
	}
404

    
405
	return 0;
406

    
407
exit_bail: /* Uh-Oh */
408
	return -1;
409
}
410

    
411
/**
412
 * Called when the module containing this driver is unloaded from kernel.
413
 */
414
static void fpga_i2c_exit(void)
415
{
416
	driver_unregister(&fpga_i2c_driver.driver);
417
}
418

    
419
module_init(fpga_i2c_init);
420
module_exit(fpga_i2c_exit);
421

    
422

    
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