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1
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# CLK2DDR
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2
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set_location_assignment PIN_Y13 -to CLK2DDR
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3
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4
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# FPGA_DDR_A
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5
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set_location_assignment PIN_AA20 -to FPGA_DDR_A[0]
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6
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set_location_assignment PIN_W21 -to FPGA_DDR_A[1]
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7
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set_location_assignment PIN_AF26 -to FPGA_DDR_A[2]
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8
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set_location_assignment PIN_W20 -to FPGA_DDR_A[3]
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9
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set_location_assignment PIN_AA23 -to FPGA_DDR_A[4]
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10
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set_location_assignment PIN_AE25 -to FPGA_DDR_A[5]
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11
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set_location_assignment PIN_AD26 -to FPGA_DDR_A[6]
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12
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set_location_assignment PIN_Y24 -to FPGA_DDR_A[7]
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13
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set_location_assignment PIN_AA26 -to FPGA_DDR_A[8]
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14
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set_location_assignment PIN_W24 -to FPGA_DDR_A[9]
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15
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set_location_assignment PIN_V16 -to FPGA_DDR_A[10]
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16
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set_location_assignment PIN_AA24 -to FPGA_DDR_A[11]
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17
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set_location_assignment PIN_AC24 -to FPGA_DDR_A[12]
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18
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set_location_assignment PIN_AE26 -to FPGA_DDR_A[13]
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19
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set_location_assignment PIN_Y4 -to FPGA_DDR_A[14]
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20
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set_location_assignment PIN_W8 -to FPGA_DDR_A[15]
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21
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|
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22
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|
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23
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# FPGA_DDR_BAS
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24
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set_location_assignment PIN_Y19 -to FPGA_DDR_BAS[0]
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25
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set_location_assignment PIN_AB23 -to FPGA_DDR_BAS[1]
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26
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set_location_assignment PIN_Y18 -to FPGA_DDR_BAS[2]
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27
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|
|
28
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# FPGA_DDR_CAS_N
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29
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set_location_assignment PIN_Y16 -to FPGA_DDR_CAS_N[0]
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30
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|
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31
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# FPGA_DDR_CKE
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32
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set_location_assignment PIN_AA4 -to FPGA_DDR_CKE[0]
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33
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|
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34
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# FPGA_DDR_CK_N
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35
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set_location_assignment PIN_AA11 -to FPGA_DDR_CK_N[0]
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36
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|
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37
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# FPGA_DDR_CK_P
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38
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set_location_assignment PIN_Y11 -to FPGA_DDR_CK_P[0]
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39
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|
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40
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# FPGA_DDR_DQM0
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41
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set_location_assignment PIN_AC4 -to FPGA_DDR_DQM0[0]
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42
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|
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43
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# FPGA_DDR_D
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44
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set_location_assignment PIN_Y8 -to FPGA_DDR_D[0]
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45
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set_location_assignment PIN_Y5 -to FPGA_DDR_D[1]
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46
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set_location_assignment PIN_U10 -to FPGA_DDR_D[2]
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47
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set_location_assignment PIN_AB4 -to FPGA_DDR_D[3]
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48
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set_location_assignment PIN_AE6 -to FPGA_DDR_D[4]
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49
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set_location_assignment PIN_AD4 -to FPGA_DDR_D[5]
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50
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set_location_assignment PIN_V10 -to FPGA_DDR_D[6]
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51
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set_location_assignment PIN_AD5 -to FPGA_DDR_D[7]
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52
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|
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53
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# FPGA_DDR_DQS0_N
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54
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set_location_assignment PIN_T8 -to FPGA_DDR_DQS0_N[0]
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55
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|
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56
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## FPGA_DDR_DQS0_P
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57
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set_location_assignment PIN_U9 -to FPGA_DDR_DQS0_P[0]
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58
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|
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59
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# FPGA_DDR_RAS_N
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60
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set_location_assignment PIN_V15 -to FPGA_DDR_RAS_N[0]
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61
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|
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62
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# FPGA_DDR_RESET_N
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63
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set_location_assignment PIN_AB26 -to FPGA_DDR_RESET_N
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64
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|
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65
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# FPGA_DDR_WE_N
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|
66
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set_location_assignment PIN_Y17 -to FPGA_DDR_WE_N[0]
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67
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|
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68
|
# RZQ_2
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69
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set_location_assignment PIN_AB25 -to RZQ_2
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|
70
|
|
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71
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# FPGA_DDR_CS_N
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72
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set_location_assignment PIN_W15 -to FPGA_DDR_CS_N[0]
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