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1
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//--------------------------------------------------------------------------
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2
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// UPPCTL - tx/rx selection, data width, data format, data rate,
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3
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// data interleave enable
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4
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//--------------------------------------------------------------------------
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5
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iowrite32( 0x02020007, (void *)(upp_base + UPCTL) );
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6
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reg_val = ioread32( (void *)(upp_base + UPCTL) );
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7
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// printk( KERN_ALERT "UPCTL = 0x%08x\n", reg_val);
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8
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9
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//--------------------------------------------------------------------------
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10
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// UPPICR - signal enable, signal inversion, clk div (tx only)
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11
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//--------------------------------------------------------------------------
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12
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// iowrite32( 0x0F180F20, (void *)(upp_base + UPICR) );
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13
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// iowrite32( 0x0F180F20, (void *)(upp_base + UPICR) );
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14
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iowrite32( 0x0F180F20, (void *)(upp_base + UPICR) );
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15
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reg_val = ioread32( (void *)(upp_base + UPICR) );
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16
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// printk( KERN_ALERT "UPICR = 0x%08x\n", reg_val);
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17
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18
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//--------------------------------------------------------------------------
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19
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// UPPIVR - idle value (tx only)
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20
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//--------------------------------------------------------------------------
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21
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iowrite32( 0x1234, (void *)(upp_base + UPIVR) );
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22
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reg_val = ioread32( (void *)(upp_base + UPIVR) );
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23
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// printk( KERN_ALERT "UPIVR = 0x%08x\n", reg_val);
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24
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25
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//--------------------------------------------------------------------------
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26
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// UPPTCR - i/o tx thresh (tx only), dma read burst size
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27
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//--------------------------------------------------------------------------
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28
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// iowrite32( 0x00010100, (void *)(upp_base + UPTCR) );
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29
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iowrite32( 0x00000000, (void *)(upp_base + UPTCR) );
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30
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reg_val = ioread32( (void *)(upp_base + UPTCR) );
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31
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// printk( KERN_ALERT "UPTCR = 0x%08x\n", reg_val);
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32
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33
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//--------------------------------------------------------------------------
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34
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// UPPDLB - digital loopback
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35
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//--------------------------------------------------------------------------
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36
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if ( UPP_CFG_DOLOOPBACK )
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37
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{
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38
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iowrite32( 0x00001000, (void *)(upp_base + UPDLB) );
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39
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}
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40
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else
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41
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{
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42
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iowrite32( 0x00000000, (void *)(upp_base + UPDLB) );
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43
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}
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44
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45
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46
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//the rxdma_line_size and txdma_line_size are bot 0x40
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47
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// the rxdma_line_count and txdma_line count are both 0x01
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48
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//--------------------------------------------------------------------------
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49
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// UPQD0 - Channel B (Rx)
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50
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//--------------------------------------------------------------------------
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51
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iowrite32( rx_start_addr, (void *)(upp_base + UPQD0) );
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52
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printk( KERN_ALERT "UPQD0 = 0x%08x\n", *(int32_t *)(upp_base + UPQD0));
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53
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54
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//--------------------------------------------------------------------------
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55
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// UPQD1 - Channel B (Rx)
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56
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//--------------------------------------------------------------------------
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57
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iowrite32( (rxdma_line_count << 16 | rxdma_line_size),
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58
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(void *)(upp_base + UPQD1) );
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59
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printk( KERN_ALERT "UPQD1 = 0x%08x\n", *(int32_t *)(upp_base + UPQD1));
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60
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61
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//--------------------------------------------------------------------------
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62
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// UPQD2 - Channel B (Rx)
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63
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//--------------------------------------------------------------------------
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64
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iowrite32( rxdma_line_size, (void *)(upp_base + UPQD2) );
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65
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printk( KERN_ALERT "UPQD2 = 0x%08x\n", *(int32_t *)(upp_base + UPQD2));
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66
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67
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return 0;
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68
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}
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69
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70
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71
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//static int upp_txdma_config( upp_dev_t *dev )
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72
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static int upp_txdma_config( void)
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73
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{
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74
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// int32_t reg_val;
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75
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76
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// wait for dma active/pending bits to clear
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77
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while ( ioread32( upp_base + UPIS2 ) & 0x00000002 )
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78
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;
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79
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80
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81
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//==========================================================================
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82
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// Program DMA channel desc. reg's
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83
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// - UPID0-2 and/or UPQD0-2.
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84
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//==========================================================================
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85
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86
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//--------------------------------------------------------------------------
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87
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// UPID0 - Channel A (Tx)
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88
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//--------------------------------------------------------------------------
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89
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iowrite32( tx_start_addr, (void *)(upp_base + UPID0) );
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90
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printk( KERN_ALERT "UPID0 = 0x%08x\n", *(int32_t *)(upp_base + UPID0));
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91
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92
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//--------------------------------------------------------------------------
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93
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// UPID1 - Channel A (Tx)
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94
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//--------------------------------------------------------------------------
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95
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iowrite32( (txdma_line_count << 16 | txdma_line_size),
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96
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(void *)(upp_base + UPID1) );
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97
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printk( KERN_ALERT "UPID1 = 0x%08x\n", *(int32_t *)(upp_base + UPID1));
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98
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99
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//--------------------------------------------------------------------------
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100
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// UPID2 - Channel A (Tx)
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101
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//--------------------------------------------------------------------------
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102
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iowrite32( txdma_line_size, (void *)(upp_base + UPID2) );
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103
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printk( KERN_ALERT "UPID2 = 0x%08x\n", *(int32_t *)(upp_base + UPID2));
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104
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105
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106
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return 0;
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107
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}
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108
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