Mity CPU Platforms » MityDSP-L138 (ARM9 Based Platforms)

I have a custom board with
-- MityDspl-138F module (with FPGA)
-- No Ethernet port
-- UART,USB,SD CARD interface
-- uPP transfer for data process

I have developed a C++ CCS 6.1.3 project with compiler version 7.4.16 which uses base of MDK_2014-01-13. I am using
\MDK_2014-01-13\sw\DSP\templates\criticallink\platforms\MityDSP-L138\platform.tci.

As per https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/Cache_and_Memory the "IRAM" is located from 0x11800000 to 0x1181FFFF and "shared RAM" is located at 0x80000000 to 0x8001FFFF are very fast.

I want to put my arrays in these two memories to make the operation fast.

1)
When I put some of array under #pragma DATA_SECTION ("IRAM");, I can see in .map file that this allocation is done in IRAM, as it is showing under used memory section. And it improves speed of process also. The only thing is,it gives me warning after compilation of DSP project as below.

warning #10247-D: creating output section "IRAM" without a SECTIONS specification

It seems some linker file is missing? What it file can be?
2)
Other thing is I want to put my arrays under "L3_CBA_RAM" in .map file which is "shared RAM", as IRAM is not enough. I am not able to use it same as IRAM. Please help me out how to use shared ram to put some arrays in it.

For your info,I have not added anything to myproject.tcf file, It is same as default generated file.

Thanks,
Vivek.