Mity CPU Platforms » MityDSP-L138 (ARM9 Based Platforms)

Could you provide more information on what is suitable for your project?

Thanks for the prompt reply!
I'm thinking about shared RAM that ARM user space linux driver will be able to mmap in order to write/read to DSP.
Thanks,
Aviv

Note if your writing your own bare-metal communication you may want to look at some of the DSPlink or syslink code as you'll need to do similar things as they do.

Talked with another engineer.

We have done a couple different things.

We have created a serial link in the FPGA which allows the ARM to open it's serial port, and another for the DSP. These are tied together allows the ARM and DSP to communicate as a normal serial port. This works fine for limited quantities of data.

We have also just passed memory addresses from the DSP to the ARM for bulk data. The ARM will access the memory usually opening "/dev/mem" and using mmap(). And the DSP can use mmap directly.

Note that you will probably have to invalidate caches when using shared memory. The CMEM ti kernel module can be used to reserve a chunk of memory and handle caching from linux user space. http://processors.wiki.ti.com/index.php/CMEM_Overview

Note we do have a wiki page on writing a bare-metal DSP app with StarterWare. https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/StarterWare

Hi, thanks for reply!
Two follow up questions:
Concerning "you may want to look at some of the DSPlink or syslink code" where could I see this code?
Concerning "opening "/dev/mem" and using mmap()": will I be able to read/write to any address in RAM?
Aviv

Aviv Prital wrote:

Hi, thanks for reply!
Two follow up questions:
Concerning "you may want to look at some of the DSPlink or syslink code" where could I see this code?

The dsplink sources are in the 2014 MDK. MDK_2014-01-13/sw/3rdparty/dsplink_linux_1_65_00_03
Syslink can be download here: http://downloads.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/syslink/index.html

Concerning "opening "/dev/mem" and using mmap()": will I be able to read/write to any address in RAM?

Yes but you shouldn't. Our default linux bootargs gives linux the first 96MB of memory to manage. Any memory managed by linux should not be directly accessed either from userspace /dev/mem or from the DSP, as this can lead to crashing your system. So under the default settings, you'd want to use the top 32MB to exchange information.

Hi,
I've leveraged TI's quickStartOMAPL1x_rCSL project and implemented the DSP side code sharing memory at SHARED_CPU_VARS_MEM 0x8001FC00 (sharedCpuVars.h).
At the ARM side I run Linux user space utility that mmaps this shared memory, reads and writes data.
The issue is that this utility successfully reads data, but cannot write. My guess is that there is no coherency between the sides. I don't see any section defined for SHARED_CPU_VARS_MEM in quickStartOMAPL1x_rCSL examples.
What are the solutions for this issue? Is there a way to flush/invalidate cache from user space?
Below is the user space code I run.
Thanks,
Aviv

typedef struct {
Uint32 cnt;
Uint32 rxpshptr; //Rx Fifo psh ptr
Uint32 rxpopptr; //Rx Fifo pop ptr
Uint32 rxfifo¹⁶; //Rx Fifo
Uint32 overflow;
} SHARED_DSP_ARM_DATA;

SHARED_DSP_ARM_DATA *sd_ptr;

int main(int argc, char *argv[]) {
if (argc < 2) {
printf("Usage: %s <phys_addr> \n", argv⁰);
return 0;
}

off_t offset = strtoul(argv[1], NULL, 16);

//size_t len = strtoul(argv[2], NULL, 16);
    size_t len = sizeof(SHARED_DSP_ARM_DATA);

// Truncate offset to a multiple of the page size, or mmap will fail.
    size_t pagesize = sysconf(_SC_PAGE_SIZE);
    off_t page_base = (offset / pagesize) * pagesize;
    off_t page_offset = offset - page_base;

int fd = open("/dev/mem", O_RDWR | O_SYNC);
    unsigned char *mem = (unsigned char *)mmap(NULL, page_offset + len, PROT_READ | PROT_WRITE, MAP_PRIVATE, fd, page_base);
    if (mem == MAP_FAILED) {
        perror("Can't map memory");
        return -1;
    }

sd_ptr = (SHARED_DSP_ARM_DATA *)&(mem[page_offset]);
    printf("1:cnt 0x%08x rxpshptr 0x%08x rxpopptr 0x%08x overflow  0x%08x\n", sd_ptr->cnt , sd_ptr->rxpshptr, sd_ptr->rxpopptr, sd_ptr->overflow);
    sd_ptr->rxpopptr += 1;
    sd_ptr->overflow = 0;
    printf("2:cnt 0x%08x rxpshptr 0x%08x rxpopptr 0x%08x overflow  0x%08x", sd_ptr->cnt , sd_ptr->rxpshptr, sd_ptr->rxpopptr, sd_ptr->overflow);
    printf("\n\n");
    return 0;
}

Check out TI's CMEM.

Note that you will probably have to invalidate caches when using shared memory. The CMEM ti kernel module can be used to reserve a chunk of memory and handle caching from linux user space. http://processors.wiki.ti.com/index.php/CMEM_Overview