Mity CPU Platforms » MitySOM-QC6490

I've got a device tree building for my carrier board, and a custom QUP configuration working! However, only 4 out of 5 of my UARTs are working. uart14 returns an error when it is probed. Here's the relevant output from dmesg:

[    0.173649] msm_serial: driver initialized
[    0.559157] 994000.serial: ttyMSM0 at MMIO 0x994000 (irq = 131, base_baud = 0) is a MSM
[    0.645297] a84000.serial: ttyHS1 at MMIO 0xa84000 (irq = 133, base_baud = 0) is a MSM
[    0.890719] a88000.serial: ttyHS2 at MMIO 0xa88000 (irq = 134, base_baud = 0) is a MSM
[    0.898195] a8c000.serial: ttyHS3 at MMIO 0xa8c000 (irq = 135, base_baud = 0) is a MSM
[    0.906298] a94000.serial: ttyHS4 at MMIO 0xa94000 (irq = 136, base_baud = 0) is a MSM
[    0.914447] qcom_geni_serial: probe of a98000.serial failed with error -22

Here's my QUP config:

const QUPv3_se_security_permissions_type qupv3_perms_lab308_mitysom[] =
{
  /*   PeriphID,         ProtocolID,               Mode,  NsOwner,       bAllowFifo, bLoad, bModExcl  */
  /*QUPV3_0_SE0  GPIO*/
  //{ QUPV3_0_SE1, QUPV3_PROTOCOL_I2C,     QUPV3_MODE_FIFO, AC_HLOS,            TRUE,  TRUE,  FALSE }, // Dev Kit PCIE
  { QUPV3_0_SE2, QUPV3_PROTOCOL_I2C,     QUPV3_MODE_FIFO, AC_HLOS,            TRUE,  TRUE,  FALSE }, // SMB / LS1 I2C
  /*QUPV3_0_SE3  GPIO*/
  /*QUPV3_0_SE4  GPIO*/
  { QUPV3_0_SE5, QUPV3_PROTOCOL_UART_2W, QUPV3_MODE_FIFO, AC_HLOS,            TRUE,  FALSE, FALSE }, // Debug UART
  /*QUPV3_0_SE6  GPIO*/
  /*QUPV3_0_SE7  GPIO*/
  { QUPV3_1_SE0, QUPV3_PROTOCOL_SPMI,    QUPV3_MODE_FIFO, AC_ADSP_Q6_ELF,     TRUE,  TRUE,  FALSE }, // QuP SPMI
  { QUPV3_1_SE1, QUPV3_PROTOCOL_UART_2W, QUPV3_MODE_FIFO, AC_HLOS,            TRUE,  TRUE,  FALSE }, // GPS UART
  { QUPV3_1_SE2, QUPV3_PROTOCOL_UART_2W, QUPV3_MODE_FIFO, AC_HLOS,            TRUE,  TRUE,  FALSE }, // CAM3 UART
  { QUPV3_1_SE3, QUPV3_PROTOCOL_UART_2W, QUPV3_MODE_FIFO, AC_HLOS,            TRUE,  TRUE,  FALSE }, // CAM2 UART
  { QUPV3_1_SE4, QUPV3_PROTOCOL_SPI,     QUPV3_MODE_FIFO, AC_HLOS,            TRUE,  TRUE,  FALSE }, // IMU SPI
  { QUPV3_1_SE5, QUPV3_PROTOCOL_UART_2W, QUPV3_MODE_FIFO, AC_HLOS,            TRUE,  TRUE,  FALSE }, // CAM1 UART
  { QUPV3_1_SE6, QUPV3_PROTOCOL_UART_2W, QUPV3_MODE_FIFO, AC_HLOS,            TRUE,  TRUE,  FALSE }, // CAM0 UART
  /*QUPV3_1_SE7  GPIO*/
};

Here's the relevant section of my device tree:

&uart9 {
    status = "okay";
};

&uart10 {
    status = "okay";
};

&uart11 {
    status = "okay";
};

&uart13 {
    status = "okay";
};

&uart14 {
    status = "okay";
};

&qup_uart9_rx {
    drive-strength = <2>;
    bias-pull-up;
};

&qup_uart9_tx {
    drive-strength = <2>;
    bias-disable;
};

&qup_uart10_rx {
    drive-strength = <2>;
    bias-pull-up;
};

&qup_uart10_tx {
    drive-strength = <2>;
    bias-disable;
};

&qup_uart11_rx {
    drive-strength = <2>;
    bias-pull-up;
};

&qup_uart11_tx {
    drive-strength = <2>;
    bias-disable;
};

&qup_uart13_rx {
    drive-strength = <2>;
    bias-pull-up;
};

&qup_uart13_tx {
    drive-strength = <2>;
    bias-disable;
};

&qup_uart14_rx {
    drive-strength = <2>;
    bias-pull-up;
};

&qup_uart14_tx {
    drive-strength = <2>;
    bias-disable;
};

As far as I can tell, I'm setting up uart14 exactly like the other 4 UARTs. Any ideas what is going on?