Activity
From 09/20/2010 to 10/19/2010
10/19/2010
- 08:52 PM Software Development: RE: LCD/Display questions
- We are looking at the user space solution. My hardware person says I'm wrong, he has attached the device I need to ac...
- 08:22 PM Software Development: RE: LCD/Display questions
- On the current industrial I/O kernel configuration, SPI0 is disabled as pins associated with it are used for the MII ...
- 08:02 PM Software Development: RE: LCD/Display questions
- I need to access spi0. It appears something related to it is compiled into the kernel (devices-da8xx.c/.o). But I don...
10/16/2010
- 07:31 PM Software Development: RE: LCD/Display questions
- Great. Sounds like for our purposes we probably don't need these commands, since we're connecting the LCD through the...
- 10:49 AM Software Development: RE: LCD/Display questions
- The "TFP410":http://focus.ti.com/docs/prod/folders/print/tfp410.html DVI interface chip is located at address 0x38 on...
10/15/2010
- 09:25 PM Software Development: RE: LCD/Display questions
- In the wiki entry on setting up the LCD, the i2cset command was used to set a couple addresses in chip 0x38. Did that...
- 02:47 PM Software Development: RE: Boot failure
- That worked. We are up and running.
A little search of the kernel source tree shows that in arch/arm/configs most of... - 01:52 PM Software Development: RE: Boot failure
- Hi Dennis,
It looks like the bootargs environment variable in u-Boot has become corrupted.
At the u-Boot prompt... - 01:39 PM Software Development: RE: Boot failure
- Script started on Fri 15 Oct 2010 10:26:41 AM PDT
cianna@ubuntudv:~$ kermit
C-Kermit 8.0.211, 10 Apr 2004, for Linu... - 07:35 AM Software Development: RE: Boot failure
- Hi Dennis,
Please send me (or post) a dump of your terminal with the following:
# Stop in u-Boot and do a "prin...
10/14/2010
- I've inherited a board that got bricked. I'm having boot problems. The kernel loads, but gets an error: it can't moun...
- 03:30 PM Software Development: RE: LCD/Display questions
- Thanks. This is the first of the steps we needed to understand.
I don't think we'll need help with the hardware it... - 03:06 PM Software Development: RE: LCD/Display questions
- Hi all,
If you have designed your own hardware using a new LCD, I'm afraid you're going to be on your own to get i... - 02:49 PM Software Development: RE: LCD/Display questions
- We're in need of some information on this item because our primary assignment now is to implement our LCD functionali...
10/12/2010
- 07:08 PM Software Development: RE: LCD/Display questions
- Related Notes: just so you know, we have an FPGA binary which supports our new LCD panel, and it maps the memory for ...
- 06:39 PM Software Development: RE: LCD/Display questions
- The wiki lists vga_640x480 and Sharp_LQ035Q7DH06 as Displays that are known. The new version of the board we have bee...
10/01/2010
- 11:00 AM FPGA Development: RE: TLK100 Ethernet
- Mike,
FYI It was the bias resistor. There was a type in the BOM and a 49.9K was installed instead of a 4.99K. ...
09/27/2010
- 04:24 PM FPGA Development: RE: TLK100 Ethernet
- Mike
Just to be sure can you tell me how you pinned out the PCB footprint. Does it match this picture looking fr... - 03:57 PM FPGA Development: RE: TLK100 Ethernet
Mike,
After talking this out with our software guy we are convinced its as your said,one of two things. The con...- 03:49 PM FPGA Development: RE: TLK100 Ethernet
- Power up the unit in your board. Stop at u_boot and type:...
- 02:05 PM FPGA Development: RE: TLK100 Ethernet
- The JTAG R's and connector are not installed.
I have the ethernet connected to my home switch.
I set the ... - 01:55 PM FPGA Development: RE: TLK100 Ethernet
- Hi John,
It looks like the OMAP MII interface is not making it to your network. The 169.254.X.X network means tha... - 01:12 PM FPGA Development: RE: TLK100 Ethernet
- Here is the ip addrs when plugged into the Critial Link and IT WORKS
Critical Link dev IT WORKS
root@mityomapl138:~... - 12:26 PM FPGA Development: RE: TLK100 Ethernet
- I didn't write them down I just typed them when he told me to. This was in u-boot. Once I typed them in I could pi...
- 07:31 AM FPGA Development: RE: TLK100 Ethernet
- What were the software commands? If they involved setting the peripheral configuration in u-Boot, then they only nee...
09/26/2010
- 11:13 PM FPGA Development: RE: TLK100 Ethernet
- Does the Ethernet on the MityDSP need to be initialized for each new TLK100 it gets plugged into? This one was init...
09/25/2010
- 02:27 PM Software Development: RE: Clean Shutdown
- I think the most important thing is to mount the root filesystem and any filesystem you have your executable on with ...
09/24/2010
- 08:34 PM FPGA Development: RE: TLK100 Ethernet
- hey would it be possible that we talk on the phone?
858-254-0008
- 08:20 PM FPGA Development: RE: TLK100 Ethernet
- That message is OK. You can set up ethernet to use MII or RMII (but not both, and you're using MII).
It looks lik... - 08:06 PM FPGA Development: RE: TLK100 Ethernet
- I saw this among the test
EMAC: MII PHY configured, RMII PHY will not be functional
I attached the whole text - 07:50 PM FPGA Development: RE: TLK100 Ethernet
- Can you dump out the text from the boot sequence? Does the u-Boot locate the PHY (via the MDIO scan)?
-Mike
- 07:42 PM FPGA Development: RE: TLK100 Ethernet
- OK I made all the changes and it still does not work. I now think there are only two difference between out circuits...
- How do you recommend we handle shutdown of our embedded device in order to ensure the consistency of the Linux file s...
- 12:02 PM Software Development: RE: LCD/Display questions
- We were able to get the LCD going with no problem, BTW. We'll be using it for our demo next week.
Thanks for the h...
09/23/2010
- 04:35 PM FPGA Development: RE: TLK100 Ethernet
- yes. you should add a pull-up.
- 04:16 PM FPGA Development: RE: TLK100 Ethernet
- Mike,
The green on the component means I used a different value cap or resistor. C216 is there but I used a 1uF c... - 03:46 PM FPGA Development: RE: TLK100 Ethernet
- Hi John,
I think you need to tie the RESET line on the phy to the MII_RESET_N signal. The SYS_RESET_N does not ge... - 03:23 PM FPGA Development: RE: TLK100 Ethernet
- More information for you.
Attached is a comparison between the Critical link schematics and ours schematics. View... - I know this is outside of your support area but I thought I would ask this in case you might have an idea of what to ...
09/22/2010
- 02:28 PM Software Development: RE: LCD/Display questions
- You'll need a different FPGA image. You also need to load an additional module (for the touchscreen controller on th...
- 02:26 PM Software Development: RE: LCD/Display questions
- Yup. That did it.
For some reason, I had copied the instructions for the Rev. C board instead of the ones above.
... - 02:05 PM Software Development: RE: LCD/Display questions
- Ah. OK. You punched in the i2c commands for the Rev C board. You have 0x3f programmed into position 0x08.
Please... - 01:53 PM Software Development: RE: LCD/Display questions
- I added a simple test pattern generator to the wiki [[LCD_configuration]]. It draws a white box around the border of ...
- 01:50 PM Software Development: RE: LCD/Display questions
- Done. Here's what I see:
0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef
00: 4c 01 10 04 ... - 08:17 AM Software Development: RE: LCD/Display questions
- After you are up and running, could you please run a...
09/21/2010
- 04:16 PM Software Development: RE: LCD/Display questions
- Definitely not a Rev C board, so it must be a B (I think we have an A here as well, but this isn't it).
Yes, actua... - 03:22 PM Software Development: RE: LCD/Display questions
- Can you please confirm the revision of your board (B, or C)?
Before you write to the /dev/fb0 device, do you see a... - 03:13 PM Software Development: RE: LCD/Display questions
- Got it working. A few oddities, but I'm now able to at least talk to the frame buffer.
The screen is all blue and ... - 10:07 AM Software Development: RE: LCD/Display questions
- William
If you are seeing blue vertical stripes (every other pixel) then the frame buffer is working..
try the foll...
09/20/2010
- 10:53 PM Software Development: RE: LCD/Display questions
- OK -- we're definitely making progress here. I now see a raster on the DVI-based monitor. It's just vertical blue str...
- 09:37 PM Software Development: RE: LCD/Display questions
- Got it. I'll check this out right now and let you know what happens.
- 08:08 PM Software Development: RE: LCD/Display questions
- That's the right image. All the files show up at the bottom of the wiki.
I've updated the wiki with more instru... - 02:23 PM Software Development: RE: LCD/Display questions
- I downloaded the file "IndustrialIO_dvi_revA-B.bin" and used it to program the FPGA (in Linux, using the instructions...
- 11:56 AM Software Development: RE: LCD/Display questions
- We'll take a look at this setup today and let you know what happens.
The next thing we'll want to know is what com...
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