Activity
From 08/30/2012 to 09/28/2012
09/27/2012
- 04:04 PM PCB Development: RE: MMCSD
- Conor,
We have addressed the MMC issues in the datasheet which can be found here by selecting the latest board ver... - 06:20 AM PCB Development: RE: MMCSD
- Thanks Mike. Once I saw it, I realised the reason why - that stubs on the connector line would warrant concern. Plus ...
- 05:36 AM PCB Development: RE: MMCSD
- Hi Conor,
You're right. I am trying to figure out what happened here and I see a note in a review that there was ... - 04:24 AM PCB Development: RE: MMCSD
- None of the documented MMCSD0 connections on the J700 are wired up. Be nice if that was documented.
- 09:47 AM PCB Development: RE: Intermittent boot failure w/ U-boot
- I found the problem.
It was not seating well in the SODIMM socket.
That's a long story, but was my fault.
I am cur... - 09:14 AM PCB Development: RE: Intermittent boot failure w/ U-boot
- Here's the SOM sheet, which I believe has everything pertinent to this issue.
U1 is providing a 67ms delay which I'm...
09/26/2012
- 06:18 PM PCB Development: RE: Intermittent boot failure w/ U-boot
- What do you have for a reset circuit? How is the reset input driven?
U-Boot shouldn't hang if there is no RS-232... - I have the 1808F on our carrier board now.
It is working and communicating RS232.
About 3/4 of power-on events, i... - 12:05 PM PCB Development: RE: MMCSD
- Hi Critical Link engineers:
If I probe (carefully) pin 5 of an SD card in place, I see the SDIO Clock. My scope sa...
09/25/2012
- 11:49 AM PCB Development: RE: MMCSD
- Further to this - I have my WL1271 module hooked up to the MityDSP board. However the driver just powers up and down ...
09/18/2012
- 05:42 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- See Table 1 in the "datasheet":http://www.mitydsp.com/images/upload/File/MityDSP-L138F%20Spec.pdf. The pins are tagg...
- 12:10 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Mike,
I didn't realize that the DVI wouldn't work with the LX-45, luckly we don't need the DVI interface. For r... - 10:18 AM Software Development: RE: Simple GPIO toggle
- It works! Thanks for all your help on this Mike. I really appreciate that.
Big Note: It still does not work on Gpi... - 08:56 AM Software Development: RE: Simple GPIO toggle
- My board is rev: 80-000268RI-2B, the latest revision.
Ah yes. I see. I really should have spotted it myself as I w... - 07:21 AM Software Development: RE: Simple GPIO toggle
- Hi Conor,
Think I found it. If you check the schematics from this "page":http://support.criticallink.com/redmine/... - 05:56 AM Software Development: RE: Simple GPIO toggle
- I took the MDK from 2012-03-12 and compiled uBoot and uImage from defaults (using industrialio-defconfig for the kern...
- 03:51 AM Software Development: RE: Simple GPIO toggle
- I cannot find any particular reason for the pins to do this in the code. I'll recompile the kernel and uboot on the o...
09/17/2012
- 07:29 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Matt,
Are you sure you have an LX-45 based FPGA? The LX-45 does not bond out 8 pins that the LX-16 does. These i... - 07:09 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Matt,
Are you using a wide screen monitor? We've seen some widescreen monitors won't lock up with VGA resoluti... - 06:32 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Mike,
Yes, I am using the DVI connector. The FPGA image I am using is one I generated for the x45 FPGA from the... - 05:58 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Matt,
If you are trying to use the DVI connector, you need to use the FPGA image that was built to run with the... - 05:42 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Ok good news! I got the FPGA bin files needed so that the FPGA ready light comes on. The not so great news is I can't...
- 10:11 AM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Mike,
Last week I didn't really have time to work on it, this week I'll know if I need more assistance.
-Matt - 08:46 AM Software Development: RE: Simple GPIO toggle
- That's supposed to be GPIO0/6 by the way...
- 08:44 AM Software Development: RE: Simple GPIO toggle
- Certainly... The PCB number is "120540". I've no boards plugged in at all - just the L138 module and the baseboard. T...
- 08:39 AM Software Development: RE: Simple GPIO toggle
- Hmmm...
Do you have an expansion board plugged in right now? Can you disconnect it if you do?
It's possible th... - 08:29 AM Software Development: RE: Simple GPIO toggle
- GPIO0/15 is the opposite which is rather odd. It starts out as 0, whereas GPIO0/7 starts out as 1:
root@mityomapl1... - 08:21 AM Software Development: RE: Simple GPIO toggle
- Thanks Mike,
When I cat from /sys/class/gpio7/value, it reads "1" all the time, no matter what I've previously wri... - 07:23 AM Software Development: RE: Simple GPIO toggle
- Hi Conor,
I don't see anything wrong with your approach. You might check the value that the pin is reading back (... - I see this has been asked before in various ways so sorry to ask again (I'm not getting it!).
I have pin 19 from J...
09/16/2012
- Like to seek your help on an uPP related question. I plan to burst out I and Q data from memory using the two uPP ch...
09/15/2012
- 06:56 AM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Matt,
Did you get through this, do you still need assistance?
-Mike
09/14/2012
- 06:24 PM Software Development: RE: Problem with uPP in DLB
- Greg,
Thanks for answer.
By the way, do you have a dummy FPGA load (in .bin format) that output "known fake d... - 05:15 PM Software Development: RE: Problem with uPP in DLB
- François,
Glad to hear that fixed your problem!
In regards to your follow up question, yes, you will most lik...
09/13/2012
- 02:43 PM Software Development: RE: Problem with uPP in DLB
- Greg,
You was right on and you make my day!
Now, I have another question regarding the cache. I used the uPP in... - 02:24 PM Software Development: RE: Problem with uPP in DLB
- Hi François,
We have not done any work with running the system in digital loopback mode. The fact that you are ge... - I am trying to use uPP in DLP mode with an MityDSP1810F board but my rx buffer is still empty after a "ransaction.
...
09/12/2012
- We are using uPP in our design - UPP XDx signals & BOOT function are muxed, what must I do?
- I am actually design an eval board using your L138 module. I am wondering if I need to care about the BOOT pins (muxe...
09/11/2012
- We need to switch power off to the entire card based on USB activity.
Any easy way to do this?
Also how long is... - 03:27 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- It's the same thing. It got branded with two names early on. Profibus really only works with the MityARM-1810, as t...
- 02:38 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- I guess now is a good time to ask, I'm not sure industrial I/O devkit or the PROFIBUS Development Kit, or if there is...
- 12:07 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Matt,
All of the images on the example site are for an LX16, which (I thought) was the standard size FPGA for m... - 11:56 AM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- *Edit*
The board acually says REV A, not sure if it matters. - 11:52 AM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Ok, thanks Mike. I'll be sure to check out the newer branches. I was able to get fpga_ctrl to load using the uimage f...
- 07:23 AM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Matt,
There are several branches on our git server. The "master" is somewhat older, which is your 2.6.34-rc1. ... - 02:00 PM PCB Development: RE: Usage of GP0 pins on MityDSP-L138F (Posted on behalf of a Customer)
- The "datasheet":http://www.mitydsp.com/images/upload/File/MityDSP-L138F%20Spec.pdf for the MityDSP-L138F contains thi...
- My programmers need to know:
What (if anything) is connected to the GPIO pins on port GP0 onboard the MityDSP-L138F ...
09/10/2012
- 10:05 AM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Mike,
If I understand what I am doing correctly, I am using version 2.6.34-rc1 and I got the kernal from git://...
09/07/2012
- 06:40 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Matt,
The error messages you are getting are from the kernel module files not being compiled against the same v... - Hi,
I've been working with our MityDSP L138F and devolopment board for a few days, today I tried to follow the ins... - 09:49 AM Software Development: RE: kernel build
- duh, I guess it helps to execute the instructions you guys post. After tftp'ing the new kernel I would just type boo...
09/06/2012
- 05:59 PM Software Development: RE: kernel build
- Scott may have found the issue ... he is going to verify and re-post ...
- Hello, I am trying to build the kernel to support EXT4 filesystems. I have downloaded the latest configuration MDK_2...
09/05/2012
- 03:03 PM Software Development: RE: L138 SD Card Boot & AISgen
- I don't have a bunch of time to wander off on this, but you might check the the DEVICE_INIT() routine of the $MDK/sw/...
- 02:44 PM Software Development: RE: L138 SD Card Boot & AISgen
- Hi Mike,
Thanks for getting back to me so quickly.
We are indeed using a non-FPGA SOM. We have DIP switches on ... - 01:15 PM Software Development: RE: L138 SD Card Boot & AISgen
- Hi Richard,
Can you confirm you using a SOM without an FPGA?
FPGA based SOMs do not expose the bootmode / boo... - Hi,
We're trying to create an SD card that contains both u-boot and our Linux kernel for an L138 module. We've now...
09/04/2012
- 04:32 PM FPGA Development: RE: Voltage of bank 3 on MityARM 1810F
- Thanks for the quick reply!
- 04:16 PM FPGA Development: RE: Voltage of bank 3 on MityARM 1810F
- No that is a typo in the UCF file. The voltage is really 1.8V.
Those lines in the UCF should be as shown below.... - 03:58 PM FPGA Development: RE: Voltage of bank 3 on MityARM 1810F
- Are these lines truly connect to the AM1808 as implied in the UCF?
- I started my FPGA code using fpga/vhdl/MityDSP_L138.ucf
I want to add to the design io_gp8(15 downto 8).
These line...
08/31/2012
- 09:58 AM Software Development: RE: Debugging DSP in VirtualBox?
- The Spectrum Digital XDS510 USB emulator pod does not seem to be useable from within the current Oracle VirtualBox.
...
08/30/2012
I followed the procedures of "Installing Open Embedded Core", no problem from step 1 to 4, but at step 5, there's n...
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