Activity
From 08/04/2013 to 09/02/2013
09/02/2013
- 08:36 AM Software Development: RE: Programming fpga from inside ARM application
- Is the ARM an linux application or a bare metal application?
If it is a linux application, you will need to write ...
08/30/2013
- We have examples of how to program the FPGA from uboot or from the linux command prompt. I have used both methods s...
- 11:15 AM Software Development: RE: OMAPL138 DSP-EDMA3 transfer from EMIFA when Linux is running on ARM
- Another update...
Now Ti reports that I have to say the linuxkernel to reserve the DMA-channels what I using on th... - 08:20 AM Software Development: RE: OMAPL138 DSP-EDMA3 transfer from EMIFA when Linux is running on ARM
- I got an response from TI. this behavior has probably something to do with the used IRQ channel on ARM side. ARM uses...
08/29/2013
- 08:31 PM Software Development: RE: tcDspFirmware::print_version_info() writes past end of buffer
- Hi John,
Thanks for the information, we'll patch this up for the next release. I'm very sorry for the bug (and c... - print_version_info() can write more bytes than the 'anMaxLen' argument. The workaround is to pass it a large enough ...
- 07:38 AM Software Development: RE: OMAPL138 DSP-EDMA3 transfer from EMIFA when Linux is running on ARM
- Thanks Mike for your quick answer!
I don't think so that it has something with my used timer(Timer64P3) to do. I p... - 07:14 AM Software Development: RE: OMAPL138 DSP-EDMA3 transfer from EMIFA when Linux is running on ARM
- I suspect that linux may be using the same EDMA resources or interrupts.
I think that the linux ARM-9 port may use... - Hi,
I'm not sure if this forum is the right place to post this question but i will do it an hopefully anybody can ...
08/28/2013
- 05:37 AM PCB Development: RE: The schematic of MityDSP-L138 Development Kit
- Hi,tom
please e-mail me the link to download the design files for the MityDSP-L138F schematic,thx!
08/26/2013
- 02:08 PM Software Development: RE: EMIFA Clock not present
- The clock started working after some FPGA machinations.
New problem:
We can read registers from the FPGA but ...
08/24/2013
- 10:11 AM Software Development: RE: DSP EDMA IRAM DATA TRANSFER
- Solved !
The problem was in the declaration of arrays to which I have copied the content of pointers. If you general...
08/23/2013
- The tcDspFpgaStepper class has a SetInterruptEnable() method that wasn't in MDK 2.11.
If you create your instance of... - 07:33 AM Software Development: RE: handover I2C bus control from ARM to DSP
- The I2C0 bus (I believe), according to the datasheet, controls both the factory configuration data as well as a Power...
08/20/2013
- Hi,
I am working with the mity L138 board, running Angstrom linux on the ARM and dspbios on the DSP. Currently, th... - 10:26 AM Software Development: RE: EMIFA Clock not present
- We are baffled. I have checked the following registers using a JTAG emulator (Blackhawk USB560 on the DSP side).
... - 08:49 AM Software Development: RE: Printf when application loads and starts on boot-up
- The short answer is yes. The long answer is just give it a shot, you never know what you might learn. :)
-Jonathan
08/19/2013
- According to the FAQ on "How do I make my application run automatically on startup" there will not be a controlling t...
08/15/2013
- 02:50 PM FPGA Development: RE: Problem programming FPGA with Linux driver
- I guess I spoke too soon. I am still having this problem - with working FPGA code, sometimes I can get the cores to ...
- 12:34 PM FPGA Development: RE: Problem programming FPGA with Linux driver
- I think I figured out the source of the problem myself. Although I didn't change anything in the module files for ba...
- 12:42 PM Software Development: RE: No DVI and serial output from MityDsp-L138 Industrial I/O board
- I'm glad it's working Phil. I'm locking this thread, but if you have any other questions, please let us know.
Than... - 10:29 AM Software Development: RE: No DVI and serial output from MityDsp-L138 Industrial I/O board
- Hi Bob,
There is no "Null Modem" printed on the serial cable provided with the dev kit. It works now after I put ...
08/14/2013
- 06:57 PM FPGA Development: RE: Problem programming FPGA with Linux driver
- I am using the Critical Link framework - the base module and the EMIFA interface are untouched.
- 06:08 PM FPGA Development: RE: Problem programming FPGA with Linux driver
- If you are not using our framework (the base module, specifically), then the state will report failed as it is probin...
- I'm having a problem programming the FPGA using the Linux driver. I am generating a core bin file using IMPACT, and ...
- 06:02 PM Software Development: RE: No DVI and serial output from MityDsp-L138 Industrial I/O board
- Phil, can you confirm that the serial cable provided with the dev kit has "Null Modem" printed on each connector?
... - We just got the board from Digi-key.
Module Part Number: L138-FX-225-RC S/N: 110174
I/O Board Number: 80-000268R... - 02:13 PM PCB Development: RE: MityDSP-L138 base board schematic
- At the moment I'm using the Industrial IO board and stopping the ARM in uBoot, so I can prototype DSP code.
Event... - 02:02 PM PCB Development: RE: MityDSP-L138 base board schematic
- The SOM schematics are not directly available. You should contact Tom Catalino if you require additional information...
- 02:00 PM PCB Development: RE: MityDSP-L138 base board schematic
- I have the Industrial IO board schematic I am trying to find the SOM schematics.
Sorry for the confusion,
Chris. - 01:56 PM PCB Development: RE: MityDSP-L138 base board schematic
- Use this link:
"http://support.criticallink.com/redmine/projects/indio/wiki/Industrial_IO_Revision_Information":ht... - Hi,
I'm designing a carrier board for the MityDSP-L138 and was wondering where I could download the MityDSP-L138 b... - 10:36 AM Software Development: RE: EMIFA Clock not present
- Yes, we are using non-FPGA modules. Double checked the schematic, reprobed, tried different SOM modules, checked the...
- 09:43 AM Software Development: RE: DSP EDMA IRAM DATA TRANSFER
- Hello again,
Basically I am trying to access an address space defined in my .tcf file (identical with DSP-side Hello...
08/13/2013
- 10:48 PM FPGA Development: RE: Programming FPGA on power up issues
- Hi,
We have resolved that issues.
We used EDK system to develop FPGA and we modified bitgen.ut below:
-g TdoP... - 06:33 PM FPGA Development: RE: Programming FPGA on power up issues
- Hi,
Sorry for the delay, are you still having issue here? Or have you solved the issue?
Can you dump your u-bo... - 06:35 PM Software Development: RE: DSP EDMA IRAM DATA TRANSFER
- 0x11822000 is not in DDR space, are you trying to access local SRAM or DDR?
-Mike
- 05:27 PM Software Development: RE: EMIFA Clock not present
- Hmm.... The EMA_CLK output should be active on power up, is it possible on your customer board there is contention. ...
- The EMIFA clock is not active on our custom board. This signal goes high and stays there. This is true after bootin...
- 09:31 AM Software Development: RE: Problems with custom board
- Thanks for the update.
-Jonathan - 09:29 AM Software Development: RE: Problems with custom board
- The problem was the GPIO. We had set the two I2C io pins as GPIO. I removed these from the list in the custom board...
- 09:11 AM Software Development: RE: DSP connection to FPGA cores
- Yes.
08/12/2013
- 07:12 PM Software Development: RE: DSP connection to FPGA cores
- Should I assume that, since I have not had a reply to my last message, my comments in that message are correct?
08/11/2013
- 10:03 PM Software Development: RE: DSP connection to FPGA cores
- Thanks for a very quick reply. So if I read or write from 0x66xxxxxx I will generate CS5 and if I read/write from 0x...
- 07:17 PM Software Development: RE: DSP connection to FPGA cores
- I don't understand what you mean by "I can't use memory mapping as this is only useful for the ARM processor.".
Th... - For previous history, see the various messages and replies in "Simple Example Needed" below. I was able to get a cus...
08/09/2013
- 09:18 AM Software Development: RE: RTC issue?
- Hi Kevin,
Would you be willing (offline) to share your schematics so that we might take a peek?
It's not obviou...
08/06/2013
- 11:15 AM Software Development: RE: Watchdog
- Yes,
You'd want to compile the davinci watchdog kernel module. - Is there a watchdog timer implemented in the MityDSP configuration anywhere that would restart Linux should the syste...
- 07:21 AM FPGA Development: RE: Programming FPGA on power up issues
- I have done 2 way CPU,Linux and u-Boot. But result is the same.
- 07:15 AM FPGA Development: RE: Programming FPGA on power up issues
- How are you loading via CPU, linux or via u-Boot?
- Hi,
I am using MityDSP-L138F(LX16 FPGA) and Carrier Board.
I developed new FPGA system that included only Upp Inter...
08/05/2013
- 11:32 AM Software Development: RE: RTC issue?
- I've check with the HW designer and he thinks it should be OK, see his info below
"The 3V_RTC pin of the L138 Modu... - 11:08 AM Software Development: RE: RTC issue?
- Have you measured the Battery Backup voltage on your board through a power cycle? If the backup voltage drops below ...
- Hi,
We are seeing an issue with the L138 RTC not running on our custom board - using hwclock we never see the time... - 06:18 AM Software Development: RE: Calculating FFT using SigProcTIDspSupport in SigProc library
- Hello,
It was the cause-thank you very much.It works. Curious enough, I now realised that the corrected implementati...
08/04/2013
- 02:52 PM Software Development: RE: Calculating FFT using SigProcTIDspSupport in SigProc library
- I think your problem is here:
for(int i=0;i!=FFT_SIZE;i+=2)
{
mpWorkBuff[i]=sin21[i];
mpW... - Hello,
I am trying to compute the FFT from 2 signals at once. So far I managed to compute the FFTs of my signals bas...
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