Mity CPU Platforms » MitySOM-5CSX Altera Cyclone V

03/06/2015

MW 08:05 AM Software Development: RE: U-boot not bringing Linux kernel up correctly

So this commit in u-Boot must also be accompanied by a patch in the kernel that is present in the 3.10LTS, 3.16 and higher kernels from rocket boards. This is the patch to the commit in the kernel needed for the u-Boot commit to work pr... Michael Williamson

03/04/2015

CW 06:44 PM Software Development: RE: Very high TX packet loss on gigabit Ethernet

Hi Mike,
I don't think those pins are associated with an IO bank. In the pin planner the default setting for those pins is the 2.5 V I/O standard, when they should be 1.8 V. Fixing this (and any other pins that were set to their defau... Chris Weinman

MW 06:24 PM Software Development: RE: Very high TX packet loss on gigabit Ethernet

Hi Chris,
Can you expand a bit? Do you mean the IO bank voltage settings were not correct?
-Mike
Michael Williamson

CW 05:58 PM Software Development: RE: Very high TX packet loss on gigabit Ethernet

Hi Mike,
I/O parameters turned out to be the problem. They were set to their default values (higher than they should have been). Doing the pin assignments properly seems to have fixed the problem, U-Boot is working without a hitch now... Chris Weinman