Mity CPU Platforms » MitySOM-5CSX Altera Cyclone V

09/08/2016

SS 08:06 AM FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot

Hi Dan,
Thanks for posting the instructions and looking at the higher resolution operation. This is very useful as it's possible we'll want to support a resolution that needs greater than 4MB for a framebuffer. We'll be using these ... Stephen Snyder

09/07/2016

DV 06:21 PM FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot

Alright, so I was able to get 1080p working. I had to make some changes to the defconfig for the hdmi example. I had to add support for CONFIG_CMA and CONFIG_DMA_CMA, which allowed the altera vip frame buffer driver to allocate enough co... Daniel Vincelette

DV 10:58 AM FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot

That's a good idea Mike, it looks like the kernel defaults vram to 4MB but for this framebuffer 8MB+ is required. I'll try setting it higher and see if I can get 1080p working today.
Thanks,
Dan Daniel Vincelette

09/06/2016

MW 08:21 PM FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot

Can you up the video ram buffer available for allocation using the kernel parameter of the format below? Michael Williamson

DV 06:29 PM FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot

Alright my testing today wasn't as successful as I'd liked. I tried both 1920x1080 and 720x576. Doing 1920x1080 caused the kernel to crash when it tried to allocate the RAM for the frame buffer to use. 720x576 appeared to boot fine but m... Daniel Vincelette

DV 09:38 AM FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot

Hi Steve,
I'm testing this now. Hopefully it's just the mods to the device tree/qsys project. I'll update once my build is finished and (fingers crossed) I'm able to get video.
Dan Daniel Vincelette

09/02/2016

SS 08:10 AM FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot

Hi Daniel,
I saw the project got pushed, thanks.
When do you think you can put together those instructions for updating the resolution?
Thanks a lot,
Steve Stephen Snyder

08/24/2016

DV 09:59 AM FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot

Hi Steve,
I'll cleanup and push the project today. I'll also go through and write down what needs to be updated in order to change resolution, I think it will be qsys, device tree, and maybe the initialization code for the HDMI chip b... Daniel Vincelette

08/23/2016

SS 03:52 PM FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot

Hi Dan,
So I'm still not getting any output on my monitors. However, I tried adjusting the monitor settings and I get a message saying out of range signal. I don't understand how I saw the yocto splash screen on this monitor at some... Stephen Snyder

DV 02:18 PM FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot

Sorry about that, it's attached now Daniel Vincelette

SS 01:41 PM FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot

Can you post that image for me to try? Stephen Snyder

DV 01:34 PM FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot

Awesome, I'll glad it did work on the TV!
I was able to recreate what I think you're seeing on your monitor. If I set my monitor's image size to auto instead of wide then it only showed up as a black screen. When I set it to wide I wa... Daniel Vincelette

SS 12:32 PM FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot

Awesome, thanks.
I tried a large screen Samsung HDTV and your latest build works.
I'm hoping that the HDTV's are a bit more forgiving with the back porch value than the monitors, and this latest build works on both.
Stephen Snyder

DV 12:10 PM FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot

Good catch, I'm doing a build now with the those back porch values. I'll let you know when it's finished. Daniel Vincelette

SS 12:00 PM FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot

One thing of note, based on the original qsys file from the wiki page, it seems the back porch values are not the same as those used in the AD9889B programming guide for 720p-60. See attached screenshots. It may be that the display's I... Stephen Snyder

SS 11:51 AM FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot

No luck, same result, just a black screen. Stephen Snyder

DV 11:14 AM FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot

Hi Steve,
Attached is a new image. The only thing I changed was that I updated the output delays for the data/control lines to match what the microtronix's example project used. It did work in my dev kit.
Let me know how it goes
... Daniel Vincelette

08/22/2016

SS 02:10 PM FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot

That's ok, thanks for the update Dan. Feel free to post an updated image anytime, even if you don't have a ton of testing. I don't mind being a guinea pig if it gets us to a working example a little bit sooner.
Stephen Snyder

DV 02:07 PM FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot

Steve,
I'm terribly sorry for the radio silence. Unfortunately I've been travelling for the past week so I haven't been able put as much time towards this as I'd like. Thank you for providing the scope captures, the data looks to be p... Daniel Vincelette

SS 07:43 AM FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot

Hi Dan,
Any update on this? Have you been able to review the scope shots?
Best,
Steve Stephen Snyder