Activity
From 05/10/2020 to 06/08/2020
06/04/2020
- Hello,
We used to be able to build preloader in Windows 7 environment. However, not any more after we upgraded to Windows 10. Same u-boot package and same build procedures. So we think the OS change might be the course for the failur...
05/27/2020
- DR 03:33 PM FPGA Development: RE: FPGA programming problems
- I will do that.
Thank you very much Dan.
Dario - DV 02:33 PM FPGA Development: RE: FPGA programming problems
- Hi Dario,
You could also try using the "sync" linux command after you copy the rbf over. That should flush anything out to the SD card. I normally do a sync and a reboot after updating the RBF. Seeing as the filesystem is read/write d... - DR 02:15 PM FPGA Development: RE: FPGA programming problems
- Hi Dan,
Don't worry, I really appreciate your help.
Yes, running “reboot” works and it is the only way to change the FPGA configuration without rebooting the system multiple times. Indeed, even if I change the rbf and then I turn the ... - DV 12:53 PM FPGA Development: RE: FPGA programming problems
- Hi Dario,
My apologizes for the later reply, it was a long holiday weekend in the states.
So by running "reboot" after copying over the RBF fixed your problem?
Dan
05/25/2020
- DR 08:39 AM FPGA Development: RE: FPGA programming problems
- Hi Dan,
thank you very much for helping me with this problem.
Attacched you can find the boot logs for the three cases required.
The checksum verification it is ok by comparing the linux checksum with the PC file. Instead there is no ...
05/22/2020
- DV 05:08 PM FPGA Development: RE: FPGA programming problems
- Hi Dario,
Thank you for the bootlog and answering my questions.
If you are seeing the yellow led toggle in u-boot then the FPGA is reloaded from what is on the file system. There is a small chance that the file system didn't fully ... - DR 07:59 AM FPGA Development: RE: FPGA programming problems
- Hi Dan,
yes, I still have the multiple boots problem.
1) I'm not changing the SDRAM bridge configuration between builds. I'm only changing the vhdl code.
2) If I copy a new rbf file and reboot the system, the fpga will be programmed w...
05/21/2020
- DV 01:01 PM FPGA Development: RE: FPGA programming problems
- Hi Dario,
If you are still seeing it take multiple boots to load the "new" rbf from u-boot then it shouldn't be a device-tree issue. Also if you're using u-boot to program it will handle opening the correct bridges, so those warnings ... - DR 08:18 AM FPGA Development: RE: FPGA programming problems
- I checked the preloader and uboot and are updated. I noticed that in the bootlog the bridges are not initialized:
altera_hps2fpga_bridge soc:fpgabridge@0: fpga bridge [hps2fpga] registered as device hps2fpga
altera_hps2fpga_bridge so...
05/17/2020
- DR 07:07 PM FPGA Development: RE: FPGA programming problems
- Hi Mike,
thank you for the detailed answer. I don’t used interruputs and UART or SPI, but I use the sdram bridge. The preloader should be updated (I will check it to be sure). I agree with you, it is better to change the rbf file and re... - MW 11:44 AM FPGA Development: RE: FPGA programming problems
- Hi Dario,
In your FPGA project, did you modify any of the HPS peripheral settings over your standard load? For example, did you enable or disable a UART or SPI port, or change the SDRAM bridge configurations?
If you did, you will ... - Hi,
I’m working with MitySOM-5CSX-H6-42A development kit and I would like to solve some annoying problems. After generating a new rbf file for programming the FPGA and uploading it to the SD card through sftp, it is necessary to reboot ...