Mity CPU Platforms » MitySOM-5CSX Altera Cyclone V

12/24/2020

12:16 PM FPGA Development: RE: Problem when programming FPGA from HPS

Confirmed. After rebuilding Kernel (tested on 3.16 and 4.9.78 versions) and disabling gpio_altera modules FPGA progra... Vladislav Borchsh

12/23/2020

07:00 AM FPGA Development: RE: Problem when programming FPGA from HPS

Hello Daniel,
Yes, I have. Ok, I'll try to do your recommendation, thanks.
Vladislav Borchsh

12/22/2020

11:29 PM FPGA Development: RE: Problem when programming FPGA from HPS

Hello,
In your design do you have kernel drivers that are accessing FPGA cores using the HPS to FPGA lightweight b... Daniel Vincelette

07:16 AM FPGA Development: RE: Problem when programming FPGA from HPS

Dear colleagues,
Are there any solutions of issue with "hot" JTAG FPGA programming? This feature very useful for m... Vladislav Borchsh

12/16/2020

05:48 PM Software Development: RE: Writing to HPS Memory tutorial

Hey Dan,
That was the problem. All fixed and working now. Thank you for the help!
Travis Travis Rawson

12/11/2020

05:13 PM Software Development: RE: Writing to HPS Memory tutorial

Hello Travis,
Are you are using a MitySOM-5CSE-L2-3Y8 Module, which has 512MB of RAM instead of 1GB? This example ... Daniel Vincelette

12/08/2020

06:51 PM Software Development: Writing to HPS Memory tutorial

Hello,
So I am working on getting data to be passed from the FPGA to the HPS. I started following the "Writing to ... Travis Rawson