Activity
From 10/15/2025 to 11/13/2025
11/12/2025
- MF 04:23 PM FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit
- Atef,
From your picture, it looks like you have the JTAG pod plugged in backwards. Pin 1 on your ribbon cable does not align with Pin 1 on the JTAG adapter board.
Please try rotating your pod connection and report back.
- Mike - AF 04:13 PM FPGA Development: JTAG programming issue on MitySOM-5CSX DevKit with Quartus (Windows 11)
- Hello,
I’m trying to program a MitySOM-5CSX board via JTAG using Quartus on Windows 11, but I encounter an error immediately when starting the operation.
I'm using :
-Tool: Quartus [version], Windows 11
-Interface: USB-Blaster [I...
11/04/2025
- SG 05:25 PM FPGA Development: RE: Building the MitySOM-5CSX
- Hi John,
Hope you are well. I'll go ahead and try and answer your questions and comments below!
* @Is there a specific example program/script, that I might have missed, to exercise an LED connected to the FPGA from a program/script...
11/03/2025
- JI 01:13 AM FPGA Development: RE: Building the MitySOM-5CSX
- In the above, I don't know where the strike-thru lines came from.
- JI 01:12 AM FPGA Development: RE: Building the MitySOM-5CSX
- Additionally, in comparing the provided sd card with the built one, I found that the directory, *scripts_auto* , does not exist. This is where the LED test (and some others) lives on the provided card.
Also, the following listing retu...
11/02/2025
- JI 02:47 AM FPGA Development: RE: Building the MitySOM-5CSX
- This past weekend I was experimenting with the provided sd card and the examples. Specifically the LED example to light and change colors of D1 on the mitysom module. I got that to work ok. After doing a little digging, it appears tha...
10/27/2025
- JI 12:37 AM FPGA Development: RE: Building the MitySOM-5CSX
- Hi Seth,
For the 1st bullet point above I followed your instructions using the *command line* and it worked. Great!
I login with *root* get the prompt, *root@mitysom-c5:~#*
I think the *unmount* instruction was the key.
Below, is ...
10/24/2025
- SG 07:51 PM FPGA Development: RE: Building the MitySOM-5CSX
- Hi John,
Thank you for the additional details. *dd* typically will take a moment to return the prompt, it does on my end as well.
If the command itself returned earlier than anticipated there's a good chance something went wrong. I... - JI 07:20 PM FPGA Development: RE: Building the MitySOM-5CSX
- Hi Seth,
All I did was extract the image and dd it right to the sd card. I will read in more detail your comments when I get home tonight and give it another go over the weekend…I’m doing this on my own time.
Something funny though.... - SG 03:09 PM FPGA Development: RE: Building the MitySOM-5CSX
- Hi John,
Thank you for providing the 3 boot outputs. I've gone ahead and taken a look and I'll make some comments below.
* @My expectation was that the directly downloaded image would work similarly. I also cannot access the 256M ... - JI 03:19 AM FPGA Development: RE: Building the MitySOM-5CSX
- Ok, so I downloaded the sd card from the website as instructed, and loaded it onto a fresh card.
I now have 3 _different_ boot outputs. I have attached 3 files with the outputs of each boot screen.
I included the output of the ori...
10/22/2025
- MF 01:46 PM FPGA Development: RE: Building the MitySOM-5CSX
- John,
Taking a look at your output it appears like you successfully recompiled the SPL and UBOOT. The differences you are noticing are due to the SD card provided on the development kit having an older release of the software on it. Y... - JI 02:19 AM FPGA Development: RE: Building the MitySOM-5CSX
- Hi, so I was able to make uboot and an sd card image. I took the image and loaded it to a blank sd card and powered up the board. I stopped it at the autoboot countdown.
Then I swapped out the sd card to the one that was provided in t...
10/21/2025
- AF 06:55 AM FPGA Development: RE: MitySOM-5CSX (5CSX-H6-42A-RI) stops at “Deasserting all peripheral resets” — request for guidance
- Hi Mike,
Thanks for your quick reply.
Here’s what I’ve tried and what I’m seeing:
Reseated the SOM in the DIMM connector → same behavior as before.
Swapped SOMs between kits → when I install the good SOM into the known-problematic... - JI 12:32 AM FPGA Development: RE: Building the MitySOM-5CSX
- Mike,
Thanks. Understood.
Regards,
John
10/20/2025
- MF 04:26 PM FPGA Development: RE: MitySOM-5CSX (5CSX-H6-42A-RI) stops at “Deasserting all peripheral resets” — request for guidance
- Hi Atef,
It sounds like based on your findings the SOM module is the issue. It looks like you may have tried to reply to this post via email, which I do not think works for attachments. Can you either reply again and type the serial n... - AF 03:41 PM FPGA Development: RE: MitySOM-5CSX (5CSX-H6-42A-RI) stops at “Deasserting all peripheral resets” — request for guidance
- [https://res.public.onecdn.static.microsoft/assets/mail/file-icon/v2/photo_16x16.png]1000008159.jpg<https://sascailabs-my.sharepoint.com/:i:/g/personal/atef_dorai_cailabs_com/EfLXHLTfMzNHoDiG-PRr9sMBAmPRqgLMED5K8e0Jwf8zUg>
[https://r... - MF 03:03 PM FPGA Development: RE: MitySOM-5CSX (5CSX-H6-42A-RI) stops at “Deasserting all peripheral resets” — request for guidance
- Hi Atef,
Thank you for the thorough debug details.
# Have you successfully used this development kit before? Or are these the symptoms you are experiencing after first receiving this development kit?
# Could you provide the serial... - Hello Critical Link Support,
I’m evaluating a MitySOM-5CSX module (part number 5CSX-H6-42A-RI) and I’m trying to run a test bitstream on the Cyclone V FPGA. I used the SD-card image from your wiki for this module:
Image source: htt... - MF 02:08 PM FPGA Development: RE: Building the MitySOM-5CSX
- John,
For some background, we have a single Quartus reference design project we have setup for the Cyclone V platform. In order to make it easier for end users, we generate this project for every variant of the platform we have and th...
10/19/2025
- JI 01:13 AM FPGA Development: RE: Building the MitySOM-5CSX
- Hi. Taking a few steps back, I was comparing the instructions from
https://support.criticallink.com/redmine/projects/mityarm-5cs/wiki/Building_fpga_231 ,
https://support.criticallink.com/redmine/projects/mityarm-5cs/wiki/Building_ub...
10/16/2025
- SG 03:36 PM FPGA Development: RE: Building the MitySOM-5CSX
- Hi John,
I appreciate all the info, no need to be sorry whatsoever! I'll go ahead and try and answer your questions and concerns below.
* @Read thru the page and figured that I could just use this tarball so I don't have to build t... - JI 01:20 AM FPGA Development: RE: Building the MitySOM-5CSX
- I am using:
Quartus prime 23.1
Ubuntu 24.04.2 LTS ( I noted that this was tested on Ubuntu 22.04...)
1. I went to the page recommended above and downloaded "mitysom-image-base-mitysom-c5.tar.gz"
2. Did some exploring and fo...