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From 11/26/2025 to 12/25/2025

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04:41 PM FPGA Development: MitySOM-5CSX Dev Kit – USB OTG J401 not detecting USB devices
Hello,
I am using a MitySOM-5CSX SOM on the standard Critical Link carrier (development kit) with Yocto (Poky 2.4.4,...
Atef Dorai
07:18 AM FPGA Development: RE: Ethernet PHY configuration and SSH access
Hello,
I am using a MitySOM-5CSX SOM on the standard Critical Link carrier (development kit) with Yocto (Poky 2.4.4,...
Atef Dorai

12/09/2025

02:54 PM FPGA Development: RE: Ethernet PHY configuration and SSH access
Hi Atef,
You should be able to do this via ethtool:...
Daniel Vincelette
02:50 PM FPGA Development: RE: Ethernet PHY configuration and SSH access
Hi Zach,
Could you please generate a Linux image for the 5CSX-H6-4YA based on the Linux image available at the fol...
Atef Dorai
10:25 AM FPGA Development: RE: Ethernet PHY configuration and SSH access
Hello,
For layout, the two groups you have outlined in your schematic snippet should be matched in length and id...
Michael Williamson
08:47 AM FPGA Development: RE: Ethernet PHY configuration and SSH access
Hi Zach,
Just a quick update on my side.
I am now able to communicate over Ethernet with our custom carrier board...
Atef Dorai
08:15 AM FPGA Development: RE: Ethernet PHY configuration and SSH access
Hi Zach,
Thank you for your reply.
I ran ethtool eth0 | grep PHYAD on my system, and it confirms that the PHY is de...
Atef Dorai

12/08/2025

05:40 PM FPGA Development: RE: Ethernet PHY configuration and SSH access
Hi Atef,
The image you downloaded should have an SSH server (OpenSSH) running by default, yes. @ps@ by default doe...
Zachary Miller
03:52 PM FPGA Development: Ethernet PHY configuration and SSH access
Hello,
I am working with a MitySOM-5CSx module on my own custom carrier board and I am seeing different behavior dep...
Atef Dorai

12/02/2025

12:47 PM FPGA Development: RE: Issue booting encrypted bitstream on MitySOM-5CSx evaluation board
Thanks, it works. Atef Dorai

12/01/2025

04:20 PM FPGA Development: RE: Issue booting encrypted bitstream on MitySOM-5CSx evaluation board
Atef,
Can you make sure you have the MSEL set appropriately per the table below?
!image.png!
Mike Fiorenza
03:40 PM FPGA Development: Issue booting encrypted bitstream on MitySOM-5CSx evaluation board
Hello,
I am trying to test bitstream encryption on a MitySOM-5CSx evaluation board and I am running into an issue du...
Atef Dorai

11/28/2025

03:57 PM FPGA Development: RE: Using the design security for MitySOM-5CSX
Hello,
I would like to encrypt the FPGA bitstream on the MitySOM-5CSX. I have been referring to Intel’s application ...
Atef Dorai
 

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