Activity
From 09/15/2014 to 10/14/2014
10/02/2014
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12:53 PM
MitySOM-5CSX Altera Cyclone V
FPGA Development: RE: HPS Memory Controller
- Hi,
Just raising this subject again. I'm going through the document for the sgdma_dispatcher, but do you guys have an example where you check to see if the dispatcher has finished transferring?
I tried reading the CSR Status regist...
10/01/2014
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02:27 PM
MitySOM-5CSX Altera Cyclone V
Software Development: RE: Port 22222
- Actually, the issue seems to be with the third party software.
So don't worry about it. -
02:07 PM
MitySOM-5CSX Altera Cyclone V
Software Development: RE: Port 22222
- Furthermore, ssh works to it.
We have a python program that tries to connect to the board via port 22222, but it returns an error stating that connection is actively refused. -
01:58 PM
MitySOM-5CSX Altera Cyclone V
Software Development: RE: Port 22222
- Hi Bob,
The only file I changed is the interface file in the /etc/network folder to give the system a static address on starting. The only thing now in the file is this.
auto eth0
iface eth0 inet static
address 192.168.2.12
ne... - BD 01:44 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Port 22222
- Jack, I'm assuming you are running the "third party software" on the PC, correct?
If so, how did you configure the MitySOM-5CSX baseboard to listen to port 22222? Please attach the files you changed. Are you using a custom server on... -
01:19 PM
MitySOM-5CSX Altera Cyclone V
Software Development: Port 22222
- Hi,
We are trying to have a third party software to connect to the board via Port 22222. We assigned a static address to both the PC and the Mityboard. We are able to ping at each other from both (but that's using port 22 on putty). A... - MK 02:31 AM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Spurious Reboot Debug
- Yes. Where do I send it?
09/30/2014
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12:41 PM
MitySOM-5CSX Altera Cyclone V
Software Development: RE: Static IP Adderess
- Hi Dan,
That works! Thank you!
Jack - DV 09:26 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Static IP Adderess
- Hello Jack,
Is your PC a windows machine? If so I believe if you have the firewall on then it will block any ping requests. So if you disable your firewall on your PC then that might solve this issue. Let me know how it goes.
Dan
09/29/2014
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06:54 PM
MitySOM-5CSX Altera Cyclone V
Software Development: Static IP Adderess
- Hi,
I tried to set a static IP address to the system, by changing the /etc/network/interface file (See below). Because we want to communicate it directly via ethernet without the USB cable.
The issue is that having assigned IP addr...
09/26/2014
- MW 09:11 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Spurious Reboot Debug
- Would you be willing to share (privately, not on the forum) your baseboard schematic?
-Mike - MK 08:19 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Spurious Reboot Debug
- Michael,
Thanks for the replay. No problem with the many questions.. I'm kind of at a loss tracking down the issue, so any tips can help.
_Are these MityARM-3359s? What is the model number? Do you also have a couple of serial num... - MA 02:27 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: GP0[4] state on boot for L138F
- ??How quickly do you need it to be low? You might put an external pull down on your board.??
Pretty much instantly would be ideal as we use it as a /SHUTDOWN control for some hardware that should only be brought up once the Mity is fu...
09/25/2014
- MW 07:46 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: GP0[4] state on boot for L138F
- How quickly do you need it to be low? You might put an external pull down on your board.
You could disable the pull up, but keep in mind the OMAP-L138 controls for the pull up are in groups, so you will affect other pins when you dis... - MA 05:11 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: GP0[4] state on boot for L138F
- Hi Mike, thanks for the explanation. As we need this pin to be low on power-up, would the best place to set this be in the U-Boot mityomap config/init code?
- MW 03:40 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: GP0[4] state on boot for L138F
- Hi,
If you check the OMAP-L138 datasheet (it's a bit convolved) Table 2-29, the GP0[4] pin pullup state is defined by CP[2] group control in the PUPDENA / PUPDSEL registers after reset completes (during reset it should be pulled down)... - Hi, we noticed that the power on state of GPIO_0_4 is that it is driven high. I am a little confused about this since I can't see anything in the U-Boot source code (u-boot-mitydspl138/board/davinci/mityomapl138/) changing PINMUX1 from t...
09/24/2014
- MW 05:59 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Spurious Reboot Debug
- Hi Mr. Karasoff,
Are these MityARM-3359s? What is the model number? Do you also have a couple of serial numbers of the modules that are exhibiting the problem?
Does the reboot issue track the SOM or the Carrier board? E.g., if y... - Hi,
I am having an intermittant issue with the MityARM on some (not all) of our custom carrier boards - The processor has spurious reboots. The processor will boot and run Linux fine, then it reboots on its own, starting at the bootl...
09/23/2014
- SB 02:05 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: UPP problem
- Problem was caused by cache incoherency. Use of BCACHE_inv() fixed it.
09/22/2014
- JC 10:19 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB Bug
- There are several missing features in the 3.14 branch that I found when trying to move to it. I created a tag to mark my findings.
http://support.criticallink.com/gitweb/?p=linux-davinci.git;a=tag;h=refs/tags/3.14_Note
I'm not sure o... - JC 10:13 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB Bug
- Note that we have seen a similar issue on the 335x. Could you checkout the following page and report back if the solution helps?
https://support.criticallink.com/redmine/projects/armc8-platforms/wiki/Using_USB_port - BK 10:11 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB Bug
- It is from your git page - as far as I remember. Our software student tried to jump to 3.14 two month ago but it didn't work completly so we jumped only to 3.7. as this seemed to work.
- MW 09:39 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB Bug
- Hello,
Are you using a 3.7 branch from our git site, or the mainline? I don't think we officially support 3.7. Do you see the same behaviour in 3.2?
-Mike - BK 09:37 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB Bug
- Another thing: When I plug in the first usb device the number of usb interrupts in /proc/interrupts increases. When I unplug it, it stops as expected. But not a single interrupt happens when I plug in another device after unplugging the ...
- Hej hej,
we have noticed a usb bug on the MityDSP and we are not sure why this happens.
We are using linux 3.7.0+-kernel with our own baseboard. The socket is configured and initialized as USB_HOST (with mityomapl138_usb_init(MUSB_...
09/21/2014
- hi,
I am having problems reading data from the FPGA to memory. I set up the UPP interface
using channel A from transmit, channel B for receive, and start the receive transactions
using the code below
#include "evmomapl137.h"
...
09/18/2014
- CB 10:07 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Mity L138F FPGA -> OMAP interrupt lines
- Thanks Mike,
I have found the pin mapping for INT0 and INT1 I couldn't find the mapping for the Non Maskable Interrupt (NMI) pin in the table. I also couldn't find the IOSTANDARD to use the interrupt pins.
Chris B.
- MW 09:48 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Mity L138F FPGA -> OMAP interrupt lines
- Hi Chris,
The information you need is in Table 4 of the "Carrier Board Design Guide":http://www.criticallink.com/wp-content/uploads/2014/01/MityDSP-L138F-Carrier-Board-Design-Guide.pdf.
-Mike
- I was trying to use an FPGA interrrupt which should be serviced by the DSP core in the OMAP.
From the MityL138.ucf I have the following FPGA pins: - CB 09:07 AM MityDSP (TI TMS320C6xxx Based Products) FPGA Development: RE: Mity L138F FPGA -> OMAP interrupt lines
- Sorry about that I thought this was the ARM9 forum, I will repost it there.
Chris B. - MW 08:40 AM MityDSP (TI TMS320C6xxx Based Products) FPGA Development: RE: Mity L138F FPGA -> OMAP interrupt lines
- Hi Chris,
This post, if for an L138 module, should be in this other forum:
https://support.criticallink.com/redmine/projects/arm9-platforms/boards
This forum / subproject is for the MityDSP-6711 and MityDSP-6455 product lines. ... - I was trying to use an FPGA interrrupt which should be serviced by the DSP core in the OMAP.
My FPGA pin map for the interrupt pins is the following:
09/17/2014
- PB 02:36 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Standard USB peripheral connection on MitySOM eval Board
- Hi,
I'm now quite stuck without the ability to use use the host mode.
I have noticed on Rocketboards something recent that seems related to the issue I'm facing :
http://git.rocketboards.org/?p=linux-socfpga.git;a=commit;h=a3a81b0... - AB 11:29 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Load FPGA Timeout Error
- Max,
Thank you for posting that.
You are correct that if VBAT is too low the module will either not boot at all and/or will not allow the FPGA to be programmed. We believe that on earlier development kits the ESD bags may have cont... - MB 10:41 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Load FPGA Timeout Error
- Hi Dan,
I had similar problem last week. After two week I tried to run my development board loading the FPGA with JTAG and using Uboot.
JTAG was not able to connect and with Uboot the return message was:
altera_load: Failed with e...
09/16/2014
- MF 09:55 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Adding SPI flash
- The part works in SPI mode 0 or 3, but I tried all four modes (0 - 3). I also tried setting the fields .c2tdelay and .t2cdelay to 0.
As I mentioned, the data appearing on the bus (SOMI), driven by the M25PE80 is correct (as seen with... - MW 09:45 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Adding SPI flash
- Is the SPI mode field correct (polarity and phase, CPOL and CPHA is the part in SPI_MODE_0)?
You also look like you are setting the delay fields (c2tdelay and t2cdelay), required?
- MF 09:06 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Adding SPI flash
- I confirmed with a scope that the chip select was not active.
I added DA850_GPIO2_15 to the the array of gpios in my baseboard file.
I also changed the .type entry in the flash_platform_data structure to "m25pe80".
In this case,... - JC 08:49 AM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Pin mapping option for Carrier board design
- This depends on at which stage you want access to the pins. Both u-boot and the kernel make changes to the pin mux. If the device needs to be accessed while you in the u-boot bootloader then u-boot should set the pinmux. If not then t...
09/15/2014
- ZJ 04:29 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Pin mapping option for Carrier board design
- I see. Thank you.
And how am I be able to change them?
Zhe