Activity
From 03/14/2015 to 04/12/2015
04/10/2015
- After successfully building my development system with Yocto, I find that the ethernet and GPIO no longer work
as can be seen in the boot sequence. Building a 3.12 system works fine. Any idea what this could be?
U-Boot SPL 2013.01.... - IR 11:30 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Created SD card for the MitySom-5CSX development board not booting correctly
- I am using the provided VM. I only work on the firmware but I will get our hardware engineer to generate the handover files required. Hopefully that will solve my issue.
Thanks for your help.
BR
Ian - DV 11:14 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Created SD card for the MitySom-5CSX development board not booting correctly
- Hi Ian,
Critical Link has a project made specifically for our development kit, it can be downloaded from our git site or if you are using our provided VM it should be under /home/user/projects.
Here is a link the the 5CSX gitweb pa... - IR 11:04 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Created SD card for the MitySom-5CSX development board not booting correctly
- Hi Dan,
No changes were made to an example project located in altera/14.0/embedded/examples/hardware/cv_soc_devkit_ghrd
If that is the problem is it possible to get a copy of the preloader and uboot binaries provided on the SD car... - DV 10:02 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Created SD card for the MitySom-5CSX development board not booting correctly
- Hi Ian,
I noticed 2 things when looking through the logs, it looks like the ethernet MAC can't find the phy and the kernel panics are coming from the USB driver.
Did you change any of the PIN muxing in qsys or is this from the base... - Hi,
I am using the MitysSOM-5CSX Altera Cyclone V development board booting from SD card. I have built the kernel, file system, u-boot and the preloader using the instructions on the WiKi. https://support.criticallink.com/redmine/projec... - All,
We just started a new project running on uC/OS-II. We selected MitySOM-5CSx Development Kit but most documents and project files are targeted Linux OS. Do you have any uC/OS-II base project we can use to configure and connect to ...
04/09/2015
- MW 09:26 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Example project
- Hi Malcom.
I will check on the memory init files issue. I seem to recall that those can be ignored, but I don't remember why off-hand.
The missing pin assignments will work (they are the HPS fixed pin assignments, and the fitter... - I've just started to evaluate the MitySOM-5CSX board and the first thing I did was install VirtualBox and the supplied Xubuntu image. After compiling the included example project in Quartus II 14.0 I noticed some critical warnings and so...
04/03/2015
- JC 01:24 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: USB port data lock ups
- Hi Jeffrey,
What version of the kernel are you running? Can you provide us the output to the command 'uname -a'? Also what 335x module model number and serial number do you have (the bad one and one of the "good" ones)?
-Jonathan - We're having an issue with data going to the USB ports on our AM3352 SOMs. We're using an FTDI FT240XS USB to 8-bit FIFO on our board to make a higher throughput connection from our microprocessor which is accumulating data rapidly and o...
03/26/2015
- JC 11:21 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Pull-up Enable for MityDSP L138 (cp[0])
- To be more specific, @CP[0]@ covers the following pins: @GP0[8] (OMAP_GP0_8), GP0[9] (OMAP_GP0_9), AHCLKX (AUDIO_SYSCLK), AHCLKR (AUDIO_SYSCLK), AFSX (AUDIO_FRAME), GP0[13] (OMAP_GP0_13), ACLKX (AUDIO_CLK), GP0[15] (OMAP_GP0_15)@
* T...
03/25/2015
- CB 10:57 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Mity L138F FPGA -> OMAP interrupt lines
- Hi Alex,
I was using MDK_2012-03-12 and in the included UCF the IO standard on those pin was different:
NET "o_nmi_n" LOC = "N8" | IOSTANDARD = LVCMOS33;
NET "o_int<0>" LOC = "K6" | IOSTANDARD = LVCMOS33;
NET "o_int<1>" LOC = "F2... - I'm trying to get a new hardware design up and running with the MityDSP L138, using the Industrial IO board as a starting point. I've noticed that in U-Boot, the enables set at DAVINCI_PUPD_ENA for groups 5, 8, 9 and 15 are set to 0 (di...
03/23/2015
- AB 05:08 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Mity L138F FPGA -> OMAP interrupt lines
- Chris,
Hopefully you happened upon this on your own but the details for the pin-configuration, voltage standards, can be found in the sample .ucf files we provide in the MDK BSP (https://support.criticallink.com/redmine/projects/arm9-...