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/*
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2
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* Critical Link MityARM-335x SoM Development Kit Baseboard Initialization File
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*
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* Someday... Someday... most of this should be replaced with device tree....
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/phy.h>
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#include <linux/usb/musb.h>
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#include <linux/dma-mapping.h>
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#include <linux/spi/spi.h>
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#include <video/da8xx-fb.h>
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#include <plat/lcdc.h> /* uhhggg... */
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#include <plat/mmc.h>
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#include <plat/usb.h>
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#include <plat/omap_device.h>
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#include <plat/mcspi.h>
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#include <plat/i2c.h>
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#include <asm/hardware/asp.h>
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#include "mux.h"
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#include "hsmmc.h"
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#include "devices.h"
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#define BASEBOARD_NAME "MityARM-335x DevKit"
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/* Vitesse 8601 register defs we need... */
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#define VSC8601_PHY_ID (0x00070420)
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#define VSC8601_PHY_MASK (0xFFFFFFFC)
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#define MII_EXTPAGE (0x1F)
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#define RGMII_SKEW (0x1C)
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/* TODO - refactor all the pinmux stuff for all board files to use */
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#define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
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struct pinmux_config {
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const char *muxname;
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int val;
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};
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#define setup_pin_mux(pin_mux) \
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{ \
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int i = 0; \
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for (; pin_mux[i].muxname != NULL; i++) \
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omap_mux_init_signal(pin_mux[i].muxname, pin_mux[i].val); \
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}
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static struct pinmux_config rgmii2_pin_mux[] = {
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{"gpmc_a0.rgmii2_tctl", AM33XX_PIN_OUTPUT},
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{"gpmc_a1.rgmii2_rctl", AM33XX_PIN_INPUT_PULLDOWN},
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{"gpmc_a2.rgmii2_td3", AM33XX_PIN_OUTPUT},
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{"gpmc_a3.rgmii2_td2", AM33XX_PIN_OUTPUT},
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{"gpmc_a4.rgmii2_td1", AM33XX_PIN_OUTPUT},
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{"gpmc_a5.rgmii2_td0", AM33XX_PIN_OUTPUT},
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{"gpmc_a6.rgmii2_tclk", AM33XX_PIN_OUTPUT},
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{"gpmc_a7.rgmii2_rclk", AM33XX_PIN_INPUT_PULLDOWN},
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{"gpmc_a8.rgmii2_rd3", AM33XX_PIN_INPUT_PULLDOWN},
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{"gpmc_a9.rgmii2_rd2", AM33XX_PIN_INPUT_PULLDOWN},
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{"gpmc_a10.rgmii2_rd1", AM33XX_PIN_INPUT_PULLDOWN},
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{"gpmc_a11.rgmii2_rd0", AM33XX_PIN_INPUT_PULLDOWN},
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{"mdio_data.mdio_data", AM33XX_PIN_INPUT_PULLUP},
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{"mdio_clk.mdio_clk", AM33XX_PIN_OUTPUT_PULLUP},
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{NULL, 0}
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};
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static struct pinmux_config lcdc_pin_mux[] = {
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/*{"lcd_data0.lcd_data0", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},*//*Change*/
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{"lcd_data0.gpio2_6", AM33XX_PIN_OUTPUT},
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{"lcd_data1.lcd_data1", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
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{"lcd_data2.lcd_data2", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
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{"lcd_data3.lcd_data3", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
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{"lcd_data4.lcd_data4", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
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{"lcd_data5.lcd_data5", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
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{"lcd_data6.lcd_data6", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
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{"lcd_data7.lcd_data7", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
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{"lcd_data8.lcd_data8", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
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{"lcd_data9.lcd_data9", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
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{"lcd_data10.lcd_data10", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
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{"lcd_data11.gpio0_8", AM33XX_PIN_OUTPUT/*| AM33XX_PULL_DISA*/},/*Change*/
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{"lcd_data12.lcd_data12", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
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{"lcd_data13.lcd_data13", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
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{"lcd_data14.lcd_data14", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
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{"lcd_data15.lcd_data15", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
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{"lcd_vsync.lcd_vsync", AM33XX_PIN_OUTPUT},
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{"lcd_hsync.lcd_hsync", AM33XX_PIN_OUTPUT},
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{"lcd_pclk.lcd_pclk", AM33XX_PIN_OUTPUT},
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{"lcd_ac_bias_en.lcd_ac_bias_en", AM33XX_PIN_OUTPUT},
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{NULL, 0}
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};
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static struct pinmux_config mmc0_pin_mux[] = {
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{"mmc0_dat3.mmc0_dat3", AM33XX_PIN_INPUT_PULLUP},
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{"mmc0_dat2.mmc0_dat2", AM33XX_PIN_INPUT_PULLUP},
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{"mmc0_dat1.mmc0_dat1", AM33XX_PIN_INPUT_PULLUP},
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{"mmc0_dat0.mmc0_dat0", AM33XX_PIN_INPUT_PULLUP},
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{"mmc0_clk.mmc0_clk", AM33XX_PIN_INPUT_PULLUP},
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{"mmc0_cmd.mmc0_cmd", AM33XX_PIN_INPUT_PULLUP},
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{"mii1_txen.gpio3_3", AM33XX_PIN_INPUT_PULLUP}, /* SD Card Detect */
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{"mii1_col.gpio3_0", AM33XX_PIN_INPUT_PULLUP}, /* SD Write Protect */
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{NULL, 0}
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};
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static struct pinmux_config can_pin_mux[] = {
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/*{"uart1_rxd.d_can1_tx", AM33XX_PULL_ENBL},
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{"uart1_txd.d_can1_rx", AM33XX_PIN_INPUT_PULLUP},
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{"mii1_txd3.d_can0_tx", AM33XX_PULL_ENBL},
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{"mii1_txd2.d_can0_rx", AM33XX_PIN_INPUT_PULLUP},*/
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{"uart1_rxd.gpio0_14", AM33XX_PIN_OUTPUT},
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{"uart1_txd.gpio0_15", AM33XX_PIN_OUTPUT},
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{"mii1_txd3.gpio0_16", AM33XX_PIN_OUTPUT},
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{"mii1_txd2.gpio0_17", AM33XX_PIN_OUTPUT},
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{NULL, 0}
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};
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static struct pinmux_config expansion_pin_mux[] = {
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{"uart0_ctsn.uart4_rxd", AM33XX_PIN_INPUT_PULLUP},/* Exp0 RX */
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{"uart0_rtsn.uart4_txd", AM33XX_PULL_ENBL}, /* Exp0 TX */
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{"mii1_rxd3.uart3_rxd", AM33XX_PIN_INPUT_PULLUP},/* Exp1 RX */
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{"mii1_rxd2.uart3_txd", AM33XX_PULL_ENBL}, /* Exp1 TX */
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{NULL, 0}
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};
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static struct pinmux_config usb_pin_mux[] = {
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{"usb0_drvvbus.usb0_drvvbus", AM33XX_PIN_OUTPUT},
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{"usb1_drvvbus.usb1_drvvbus", AM33XX_PIN_OUTPUT},
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{NULL, 0}
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};
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static struct omap2_hsmmc_info mmc_info[] __initdata = {
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{
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.mmc = 1,
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.caps = MMC_CAP_4_BIT_DATA,
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.gpio_cd = GPIO_TO_PIN(3, 3),
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.gpio_wp = GPIO_TO_PIN(3, 0),
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.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
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},
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{}
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};
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static __init void baseboard_setup_expansion(void)
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{
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setup_pin_mux(expansion_pin_mux);
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}
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static __init void baseboard_setup_can(void)
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{
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setup_pin_mux(can_pin_mux);
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/*am33xx_d_can_init(0);
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am33xx_d_can_init(1);*/
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}
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static struct omap_musb_board_data board_data = {
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.interface_type = MUSB_INTERFACE_ULPI,
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.mode = MUSB_OTG,
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.power = 500,
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.instances = 1,
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};
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static __init void baseboard_setup_usb(void)
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{
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setup_pin_mux(usb_pin_mux);
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usb_musb_init(&board_data);
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}
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static __init void baseboard_setup_mmc(void)
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{
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/* pin mux */
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setup_pin_mux(mmc0_pin_mux);
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/* configure mmc */
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omap2_hsmmc_init(mmc_info);
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}
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static const struct display_panel disp_panel = {
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WVGA, /* panel_type */
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32, /* max_bpp */
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16, /* min_bpp */
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COLOR_ACTIVE, /* panel_shade */
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};
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static struct lcd_ctrl_config dvi_cfg = {
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.p_disp_panel = &disp_panel,
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.ac_bias = 255,
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.ac_bias_intrpt = 0,
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.dma_burst_sz = 16,
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.bpp = 16,
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.fdd = 0x80,
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.tft_alt_mode = 0,
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.stn_565_mode = 0,
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.mono_8bit_mode = 0,
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.invert_line_clock = 1,
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.invert_frm_clock = 1,
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.sync_edge = 0,
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.sync_ctrl = 1,
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.raster_order = 0,
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};
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/* TODO - should really update driver to support VESA mode timings... */
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struct da8xx_lcdc_platform_data dvi_pdata = {
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.manu_name = "VESA",
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.controller_data = &dvi_cfg,
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.type = "800x600",
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};
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static __init void baseboard_setup_dvi(void)
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{
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struct clk *disp_pll;
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/* pinmux */
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setup_pin_mux(lcdc_pin_mux);
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/* add I2C1 device entry *//*Change*/
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/* TODO - really need to modify da8xx driver to support mating to the
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* TFP410 and tweaking settings at the driver level... need to stew on
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* this..
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*/
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/* configure / enable LCDC */
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/*disp_pll = clk_get(NULL, "dpll_disp_ck");
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if (IS_ERR(disp_pll)) {
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pr_err("Connect get disp_pll\n");
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return;
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}
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if (clk_set_rate(disp_pll, 300000000)) {
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pr_warning("%s: Unable to initialize display PLL.\n",
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__func__);
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goto out;
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}*/
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pr_info("MODIFIED LCD****...\n");
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/*if (am33xx_register_lcdc(&dvi_pdata))
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pr_warning("%s: Unable to register LCDC device.\n",
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__func__);*/
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/* backlight */
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out:
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clk_put(disp_pll);
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}
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247
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/* Module pin mux for mcasp1 */
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static struct pinmux_config mcasp1_pin_mux[] = {
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{"mcasp0_aclkr.mcasp1_aclkx", AM33XX_PIN_INPUT_PULLDOWN},
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{"mcasp0_fsr.mcasp1_fsx", AM33XX_PIN_INPUT_PULLDOWN},
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{"mcasp0_axr1.mcasp1_axr0", AM33XX_PIN_OUTPUT},
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{"mcasp0_ahclkx.mcasp1_axr1", AM33XX_PIN_INPUT_PULLDOWN},
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{"mii1_rxd0.mcasp1_ahclkr", AM33XX_PIN_INPUT_PULLDOWN},
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{"mii1_refclk.mcasp1_ahclkx", AM33XX_PIN_INPUT_PULLDOWN},
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{NULL, 0},
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};
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257
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static struct pinmux_config spi0_pin_mux[] = {
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{"spi0_cs0.spi0_cs0", AM33XX_PIN_OUTPUT_PULLUP},
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{"spi0_cs1.spi0_cs1", AM33XX_PIN_OUTPUT_PULLUP},
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{"spi0_sclk.spi0_sclk", AM33XX_PIN_OUTPUT_PULLUP},
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{"spi0_d0.spi0_d0", AM33XX_PIN_OUTPUT},
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{"spi0_d1.spi0_d1", AM33XX_PIN_INPUT_PULLUP},
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{NULL, 0},
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};
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266
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267
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static u8 am335x_iis_serializer_direction[] = {
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TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
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};
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|
274
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static struct snd_platform_data baseboard_snd_data = {
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.tx_dma_offset = 0x46400000, /* McASP1 */
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.rx_dma_offset = 0x46400000,
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.op_mode = DAVINCI_MCASP_IIS_MODE,
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.num_serializer = ARRAY_SIZE(am335x_iis_serializer_direction),
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279
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.tdm_slots = 2,
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.serial_dir = am335x_iis_serializer_direction,
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.asp_chan_q = EVENTQ_2,
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.version = MCASP_VERSION_3,
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.txnumevt = 1,
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.rxnumevt = 1,
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};
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286
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|
287
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static struct omap2_mcspi_device_config spi0_ctlr_data = {
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288
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.turbo_mode = 0,
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289
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.single_channel = 0,
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.d0_is_mosi = 1,
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291
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};
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292
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|
293
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static struct spi_board_info baseboard_spi0_slave_info[] = {
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294
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{
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.modalias = "tlv320aic26-codec",
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.controller_data = &spi0_ctlr_data,
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.irq = -1,
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298
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.max_speed_hz = 2000000,
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299
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.bus_num = 1,
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300
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.chip_select = 1,
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.mode = SPI_MODE_1,
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},
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303
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/* TODO -- add touchscreen connector options */
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304
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};
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305
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306
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static __init void baseboard_setup_audio(void)
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307
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{
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308
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pr_info("Configuring audio...\n");
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309
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setup_pin_mux(mcasp1_pin_mux);
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310
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setup_pin_mux(spi0_pin_mux);
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311
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am335x_register_mcasp1(&baseboard_snd_data);
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312
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spi_register_board_info(baseboard_spi0_slave_info,
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ARRAY_SIZE(baseboard_spi0_slave_info));
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314
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}
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315
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316
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static struct pinmux_config i2c0_pin_mux[] = {
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{"i2c0_sda.i2c0_sda", AM33XX_SLEWCTRL_SLOW | AM33XX_PULL_ENBL |
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AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT},
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{"i2c0_scl.i2c0_scl", AM33XX_SLEWCTRL_SLOW | AM33XX_PULL_ENBL |
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AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT},
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321
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{NULL, 0},
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322
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};
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323
|
|
324
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static void __init baseboard_i2c0_init(void)
|
325
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{
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326
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setup_pin_mux(i2c0_pin_mux);
|
327
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omap_register_i2c_bus(1, 100, NULL, 0);
|
328
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}
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329
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|
330
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/* fixup for the Vitesse 8601 PHY on the MityARM335x dev kit.
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331
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* We need to adjust the recv clock skew to recenter the data eye.
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332
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*/
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333
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static int am335x_vsc8601_phy_fixup(struct phy_device *phydev)
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334
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{
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335
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unsigned int val;
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336
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|
337
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pr_info("am335x_vsc8601_phy_fixup %x here addr = %d\n",
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phydev->phy_id, phydev->addr);
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339
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|
340
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/* skew control is in extended register set */
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341
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if (phy_write(phydev, MII_EXTPAGE, 1) < 0) {
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342
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pr_err("Error enabling extended PHY regs\n");
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343
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return 1;
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344
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}
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345
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/* read the skew */
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346
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val = phy_read(phydev, RGMII_SKEW);
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347
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if (val < 0) {
|
348
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pr_err("Error reading RGMII skew reg\n");
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349
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return val;
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350
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}
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351
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val &= 0x0FFF; /* clear skew values */
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val |= 0x3000; /* 0 Tx skew, 2.0ns Rx skew */
|
353
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if (phy_write(phydev, RGMII_SKEW, val) < 0) {
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354
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pr_err("failed to write RGMII_SKEW\n");
|
355
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return 1;
|
356
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}
|
357
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/* disable the extended page access */
|
358
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if (phy_write(phydev, MII_EXTPAGE, 0) < 0) {
|
359
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pr_err("Error disabling extended PHY regs\n");
|
360
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return 1;
|
361
|
}
|
362
|
return 0;
|
363
|
}
|
364
|
|
365
|
static __init void baseboard_setup_enet(void)
|
366
|
{
|
367
|
/* pinmux */
|
368
|
setup_pin_mux(rgmii2_pin_mux);
|
369
|
|
370
|
/* network configuration done in SOM code */
|
371
|
/* PHY address setup? */
|
372
|
/* Register PHY fixup to adjust rx clock skew */
|
373
|
phy_register_fixup_for_uid(VSC8601_PHY_ID,
|
374
|
VSC8601_PHY_MASK,
|
375
|
am335x_vsc8601_phy_fixup);
|
376
|
}
|
377
|
|
378
|
static __init int baseboard_init(void)
|
379
|
{
|
380
|
pr_info("%s [%s]...\n", __func__, BASEBOARD_NAME);
|
381
|
|
382
|
baseboard_setup_enet();
|
383
|
|
384
|
baseboard_setup_mmc();
|
385
|
|
386
|
baseboard_setup_usb();
|
387
|
|
388
|
baseboard_setup_expansion();
|
389
|
|
390
|
baseboard_setup_expansion();
|
391
|
|
392
|
baseboard_setup_dvi();
|
393
|
|
394
|
baseboard_setup_can();
|
395
|
|
396
|
//baseboard_setup_audio();/*Change*/
|
397
|
|
398
|
baseboard_i2c0_init();
|
399
|
|
400
|
return 0;
|
401
|
}
|
402
|
arch_initcall_sync(baseboard_init);
|
403
|
|