42 |
42 |
/* Vitesse 8601 register defs we need... */
|
43 |
43 |
#define VSC8601_PHY_ID (0x00070420)
|
44 |
44 |
#define VSC8601_PHY_MASK (0xFFFFFFFC)
|
45 |
|
#define MII_EXTPAGE (0x1F)
|
46 |
|
#define RGMII_SKEW (0x1C)
|
|
45 |
#define MII_EXTPAGE (0x1F)
|
|
46 |
#define RGMII_SKEW (0x1C)
|
47 |
47 |
#define MITY335X_DK_SPIBUS_TS (1)
|
48 |
48 |
|
49 |
49 |
/* TODO - refactor all the pinmux stuff for all board files to use */
|
50 |
50 |
#define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
|
51 |
51 |
|
52 |
|
#define MITY335X_DK_GPIO_TS_IRQ_N GPIO_TO_PIN(0,20)
|
53 |
|
#define MITY335X_DK_GPIO_BACKLIGHT GPIO_TO_PIN(3,14)
|
|
52 |
#define MITY335X_DK_GPIO_TS_IRQ_N GPIO_TO_PIN(0,20)
|
|
53 |
#define MITY335X_DK_GPIO_BACKLIGHT GPIO_TO_PIN(3,14)
|
54 |
54 |
|
55 |
55 |
|
56 |
56 |
#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
|
57 |
|
defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
|
|
57 |
defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
|
58 |
58 |
#define TS_USE_SPI 0 /*1 -- currently not supported*/
|
59 |
59 |
#else
|
60 |
60 |
#define TS_USE_SPI 0
|
61 |
61 |
#endif
|
62 |
62 |
struct pinmux_config {
|
63 |
|
const char *muxname;
|
64 |
|
int val;
|
|
63 |
const char *muxname;
|
|
64 |
int val;
|
65 |
65 |
};
|
66 |
66 |
|
67 |
67 |
|
68 |
68 |
#define setup_pin_mux(pin_mux) \
|
69 |
69 |
{ \
|
70 |
|
int i = 0; \
|
71 |
|
for (; pin_mux[i].muxname != NULL; i++) \
|
72 |
|
omap_mux_init_signal(pin_mux[i].muxname, pin_mux[i].val); \
|
|
70 |
int i = 0; \
|
|
71 |
for (; pin_mux[i].muxname != NULL; i++) \
|
|
72 |
omap_mux_init_signal(pin_mux[i].muxname, pin_mux[i].val); \
|
73 |
73 |
}
|
74 |
74 |
|
75 |
75 |
/******************************************************************************
|
... | ... | |
80 |
80 |
*
|
81 |
81 |
*****************************************************************************/
|
82 |
82 |
|
|
83 |
static struct pinmux_config rmii2_pin_mux[] = {
|
|
84 |
{"gpmc_csn3.rmii2_crs_dv", AM33XX_PIN_INPUT_PULLUP},
|
|
85 |
// {"gpmc_wait0.rmii2_crs_dv", AM33XX_PIN_INPUT_PULLUP},
|
|
86 |
{"gpmc_a0.rmii2_txen", AM33XX_PIN_OUTPUT}, // --
|
|
87 |
{"gpmc_a5.rmii2_txd0", AM33XX_PIN_OUTPUT}, // --
|
|
88 |
{"gpmc_a4.rmii2_txd1", AM33XX_PIN_OUTPUT}, // ---
|
|
89 |
{"gpmc_a11.rmii2_rxd0", AM33XX_PIN_INPUT_PULLDOWN}, // --
|
|
90 |
{"gpmc_a10.rmii2_rxd1", AM33XX_PIN_INPUT_PULLDOWN}, // --
|
|
91 |
{"mii1_col.rmii2_refclk", AM33XX_PIN_INPUT_PULLDOWN}, // --
|
|
92 |
{"mdio_data.mdio_data", AM33XX_PIN_INPUT_PULLUP},
|
|
93 |
{"mdio_clk.mdio_clk", AM33XX_PIN_OUTPUT_PULLUP},
|
|
94 |
{NULL, 0}
|
|
95 |
};
|
83 |
96 |
static struct pinmux_config rgmii2_pin_mux[] = {
|
84 |
|
{"gpmc_a0.rgmii2_tctl", AM33XX_PIN_OUTPUT},
|
85 |
|
{"gpmc_a1.rgmii2_rctl", AM33XX_PIN_INPUT_PULLDOWN},
|
86 |
|
{"gpmc_a2.rgmii2_td3", AM33XX_PIN_OUTPUT},
|
87 |
|
{"gpmc_a3.rgmii2_td2", AM33XX_PIN_OUTPUT},
|
88 |
|
{"gpmc_a4.rgmii2_td1", AM33XX_PIN_OUTPUT},
|
89 |
|
{"gpmc_a5.rgmii2_td0", AM33XX_PIN_OUTPUT},
|
90 |
|
{"gpmc_a6.rgmii2_tclk", AM33XX_PIN_OUTPUT},
|
91 |
|
{"gpmc_a7.rgmii2_rclk", AM33XX_PIN_INPUT_PULLDOWN},
|
92 |
|
{"gpmc_a8.rgmii2_rd3", AM33XX_PIN_INPUT_PULLDOWN},
|
93 |
|
{"gpmc_a9.rgmii2_rd2", AM33XX_PIN_INPUT_PULLDOWN},
|
94 |
|
{"gpmc_a10.rgmii2_rd1", AM33XX_PIN_INPUT_PULLDOWN},
|
95 |
|
{"gpmc_a11.rgmii2_rd0", AM33XX_PIN_INPUT_PULLDOWN},
|
96 |
|
{"mdio_data.mdio_data", AM33XX_PIN_INPUT_PULLUP},
|
97 |
|
{"mdio_clk.mdio_clk", AM33XX_PIN_OUTPUT_PULLUP},
|
98 |
|
{NULL, 0}
|
|
97 |
{"gpmc_a0.rgmii2_tctl", AM33XX_PIN_OUTPUT},
|
|
98 |
{"gpmc_a1.rgmii2_rctl", AM33XX_PIN_INPUT_PULLDOWN},
|
|
99 |
{"gpmc_a2.rgmii2_td3", AM33XX_PIN_OUTPUT},
|
|
100 |
{"gpmc_a3.rgmii2_td2", AM33XX_PIN_OUTPUT},
|
|
101 |
{"gpmc_a4.rgmii2_td1", AM33XX_PIN_OUTPUT},
|
|
102 |
{"gpmc_a5.rgmii2_td0", AM33XX_PIN_OUTPUT},
|
|
103 |
{"gpmc_a6.rgmii2_tclk", AM33XX_PIN_OUTPUT},
|
|
104 |
{"gpmc_a7.rgmii2_rclk", AM33XX_PIN_INPUT_PULLDOWN},
|
|
105 |
{"gpmc_a8.rgmii2_rd3", AM33XX_PIN_INPUT_PULLDOWN},
|
|
106 |
{"gpmc_a9.rgmii2_rd2", AM33XX_PIN_INPUT_PULLDOWN},
|
|
107 |
{"gpmc_a10.rgmii2_rd1", AM33XX_PIN_INPUT_PULLDOWN},
|
|
108 |
{"gpmc_a11.rgmii2_rd0", AM33XX_PIN_INPUT_PULLDOWN},
|
|
109 |
{"mdio_data.mdio_data", AM33XX_PIN_INPUT_PULLUP},
|
|
110 |
{"mdio_clk.mdio_clk", AM33XX_PIN_OUTPUT_PULLUP},
|
|
111 |
{NULL, 0}
|
99 |
112 |
};
|
100 |
113 |
|
101 |
114 |
static struct pinmux_config lcdc_pin_mux[] = {
|
102 |
|
{"lcd_data0.lcd_data0", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
103 |
|
{"lcd_data1.lcd_data1", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
104 |
|
{"lcd_data2.lcd_data2", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
105 |
|
{"lcd_data3.lcd_data3", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
106 |
|
{"lcd_data4.lcd_data4", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
107 |
|
{"lcd_data5.lcd_data5", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
108 |
|
{"lcd_data6.lcd_data6", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
109 |
|
{"lcd_data7.lcd_data7", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
110 |
|
{"lcd_data8.lcd_data8", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
111 |
|
{"lcd_data9.lcd_data9", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
112 |
|
{"lcd_data10.lcd_data10", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
113 |
|
{"lcd_data11.lcd_data11", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
114 |
|
{"lcd_data12.lcd_data12", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
115 |
|
{"lcd_data13.lcd_data13", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
116 |
|
{"lcd_data14.lcd_data14", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
117 |
|
{"lcd_data15.lcd_data15", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
118 |
|
{"lcd_vsync.lcd_vsync", AM33XX_PIN_OUTPUT},
|
119 |
|
{"lcd_hsync.lcd_hsync", AM33XX_PIN_OUTPUT},
|
120 |
|
{"lcd_pclk.lcd_pclk", AM33XX_PIN_OUTPUT},
|
121 |
|
{"lcd_ac_bias_en.lcd_ac_bias_en", AM33XX_PIN_OUTPUT},
|
122 |
|
/* GPIO for the backlight */
|
123 |
|
{ "mcasp0_aclkx.gpio3_14", AM33XX_PIN_OUTPUT},
|
124 |
|
{NULL, 0}
|
|
115 |
#if 0 //danm
|
|
116 |
{"lcd_data0.lcd_data0", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
|
117 |
{"lcd_data1.lcd_data1", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
|
118 |
{"lcd_data2.lcd_data2", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
|
119 |
{"lcd_data3.lcd_data3", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
|
120 |
{"lcd_data4.lcd_data4", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
|
121 |
{"lcd_data5.lcd_data5", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
|
122 |
{"lcd_data6.lcd_data6", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
|
123 |
{"lcd_data7.lcd_data7", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
|
124 |
{"lcd_data8.lcd_data8", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
|
125 |
{"lcd_data9.lcd_data9", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
|
126 |
{"lcd_data10.lcd_data10", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
|
127 |
{"lcd_data11.lcd_data11", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
|
128 |
{"lcd_data12.lcd_data12", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
|
129 |
{"lcd_data13.lcd_data13", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
|
130 |
{"lcd_data14.lcd_data14", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
|
131 |
{"lcd_data15.lcd_data15", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
|
|
132 |
{"lcd_vsync.lcd_vsync", AM33XX_PIN_OUTPUT},
|
|
133 |
{"lcd_hsync.lcd_hsync", AM33XX_PIN_OUTPUT},
|
|
134 |
{"lcd_pclk.lcd_pclk", AM33XX_PIN_OUTPUT},
|
|
135 |
{"lcd_ac_bias_en.lcd_ac_bias_en", AM33XX_PIN_OUTPUT},
|
|
136 |
/* GPIO for the backlight */
|
|
137 |
{ "mcasp0_aclkx.gpio3_14", AM33XX_PIN_OUTPUT},
|
|
138 |
#endif
|
|
139 |
{NULL, 0}
|
125 |
140 |
};
|
126 |
141 |
|
127 |
142 |
static struct pinmux_config mmc0_pin_mux[] = {
|
128 |
|
{"mmc0_dat3.mmc0_dat3", AM33XX_PIN_INPUT_PULLUP},
|
129 |
|
{"mmc0_dat2.mmc0_dat2", AM33XX_PIN_INPUT_PULLUP},
|
130 |
|
{"mmc0_dat1.mmc0_dat1", AM33XX_PIN_INPUT_PULLUP},
|
131 |
|
{"mmc0_dat0.mmc0_dat0", AM33XX_PIN_INPUT_PULLUP},
|
132 |
|
{"mmc0_clk.mmc0_clk", AM33XX_PIN_INPUT_PULLUP},
|
133 |
|
{"mmc0_cmd.mmc0_cmd", AM33XX_PIN_INPUT_PULLUP},
|
134 |
|
{"mii1_txen.gpio3_3", AM33XX_PIN_INPUT_PULLUP}, /* SD Card Detect */
|
135 |
|
{"mii1_col.gpio3_0", AM33XX_PIN_INPUT_PULLUP}, /* SD Write Protect */
|
136 |
|
{NULL, 0}
|
|
143 |
{"mmc0_dat3.mmc0_dat3", AM33XX_PIN_INPUT_PULLUP},
|
|
144 |
{"mmc0_dat2.mmc0_dat2", AM33XX_PIN_INPUT_PULLUP},
|
|
145 |
{"mmc0_dat1.mmc0_dat1", AM33XX_PIN_INPUT_PULLUP},
|
|
146 |
{"mmc0_dat0.mmc0_dat0", AM33XX_PIN_INPUT_PULLUP},
|
|
147 |
{"mmc0_clk.mmc0_clk", AM33XX_PIN_INPUT_PULLUP},
|
|
148 |
{"mmc0_cmd.mmc0_cmd", AM33XX_PIN_INPUT_PULLUP},
|
|
149 |
// danm {"mii1_txen.gpio3_3", AM33XX_PIN_INPUT_PULLUP}, /* SD Card Detect */
|
|
150 |
// {"mii1_col.gpio3_0", AM33XX_PIN_INPUT_PULLUP}, /* SD Write Protect */
|
|
151 |
{NULL, 0}
|
137 |
152 |
};
|
138 |
153 |
|
139 |
154 |
/**
|
140 |
155 |
* Expansion connector pins for SDIO
|
141 |
|
* Pin WifiJ1 DevJ700 335X PIN/Function
|
142 |
|
* 1 SDIO_D3 GPMC_AD15 GPMC_AD15/MMC2_DAT3
|
143 |
|
* 3 SDIO_D2 GPMC_AD14 GPMC_AD14/MMC2_DAT2
|
144 |
|
* 5 SDIO_D1 GPMC_AD13 GPMC_AD13/MMC2_DAT1
|
145 |
|
* 7 SDIO_D0 GPMC_AD12 GPMC_AD12/MMC2_DAT0
|
146 |
|
* 9 RESET GPMC_AD11 GPMC_AD11/GPIO2_27
|
147 |
|
* 22 SDIO_CMD GPMC_CS3_N GPMC_CSN3/MMC2_CMD
|
148 |
|
* 30 SDIO_CLK GPMC_CLK GPMC_CLK/MMC2_CLK
|
|
156 |
* Pin WifiJ1 DevJ700 335X PIN/Function
|
|
157 |
* 1 SDIO_D3 GPMC_AD15 GPMC_AD15/MMC2_DAT3
|
|
158 |
* 3 SDIO_D2 GPMC_AD14 GPMC_AD14/MMC2_DAT2
|
|
159 |
* 5 SDIO_D1 GPMC_AD13 GPMC_AD13/MMC2_DAT1
|
|
160 |
* 7 SDIO_D0 GPMC_AD12 GPMC_AD12/MMC2_DAT0
|
|
161 |
* 9 RESET GPMC_AD11 GPMC_AD11/GPIO2_27
|
|
162 |
* 22 SDIO_CMD GPMC_CS3_N GPMC_CSN3/MMC2_CMD
|
|
163 |
* 30 SDIO_CLK GPMC_CLK GPMC_CLK/MMC2_CLK
|
149 |
164 |
*/
|
150 |
165 |
static struct pinmux_config mmc2_pin_mux[] = {
|
151 |
|
{"gpmc_ad15.mmc2_dat3", AM33XX_PIN_INPUT_PULLUP},
|
152 |
|
{"gpmc_ad14.mmc2_dat2", AM33XX_PIN_INPUT_PULLUP},
|
153 |
|
{"gpmc_ad13.mmc2_dat1", AM33XX_PIN_INPUT_PULLUP},
|
154 |
|
{"gpmc_ad12.mmc2_dat0", AM33XX_PIN_INPUT_PULLUP},
|
155 |
|
{"gpmc_clk.mmc2_clk", AM33XX_PIN_INPUT_PULLUP},
|
156 |
|
{"gpmc_csn3.mmc2_cmd", AM33XX_PIN_INPUT_PULLUP},
|
157 |
|
{NULL, 0}
|
|
166 |
{"gpmc_ad15.mmc2_dat3", AM33XX_PIN_INPUT_PULLUP},
|
|
167 |
{"gpmc_ad14.mmc2_dat2", AM33XX_PIN_INPUT_PULLUP},
|
|
168 |
{"gpmc_ad13.mmc2_dat1", AM33XX_PIN_INPUT_PULLUP},
|
|
169 |
{"gpmc_ad12.mmc2_dat0", AM33XX_PIN_INPUT_PULLUP},
|
|
170 |
{"gpmc_clk.mmc2_clk", AM33XX_PIN_INPUT_PULLUP},
|
|
171 |
{"gpmc_csn3.mmc2_cmd", AM33XX_PIN_INPUT_PULLUP},
|
|
172 |
{NULL, 0}
|
158 |
173 |
};
|
159 |
174 |
|
160 |
175 |
|
161 |
176 |
static struct pinmux_config can_pin_mux[] = {
|
162 |
|
{"uart1_rxd.d_can1_tx", AM33XX_PULL_ENBL},
|
163 |
|
{"uart1_txd.d_can1_rx", AM33XX_PIN_INPUT_PULLUP},
|
164 |
|
{"mii1_txd3.d_can0_tx", AM33XX_PULL_ENBL},
|
165 |
|
{"mii1_txd2.d_can0_rx", AM33XX_PIN_INPUT_PULLUP},
|
166 |
|
{NULL, 0}
|
|
177 |
{"uart1_rxd.d_can1_tx", AM33XX_PULL_ENBL},
|
|
178 |
{"uart1_txd.d_can1_rx", AM33XX_PIN_INPUT_PULLUP},
|
|
179 |
{"mii1_txd3.d_can0_tx", AM33XX_PULL_ENBL},
|
|
180 |
{"mii1_txd2.d_can0_rx", AM33XX_PIN_INPUT_PULLUP},
|
|
181 |
{NULL, 0}
|
167 |
182 |
};
|
168 |
183 |
|
169 |
184 |
static struct pinmux_config expansion_pin_mux[] = {
|
170 |
|
{"uart0_ctsn.uart4_rxd", AM33XX_PIN_INPUT_PULLUP},/* Exp0 RX */
|
171 |
|
{"uart0_rtsn.uart4_txd", AM33XX_PULL_ENBL}, /* Exp0 TX */
|
172 |
|
{"mii1_rxd3.uart3_rxd", AM33XX_PIN_INPUT_PULLUP},/* Exp1 RX */
|
173 |
|
{"mii1_rxd2.uart3_txd", AM33XX_PULL_ENBL}, /* Exp1 TX */
|
174 |
|
{"mii1_rxd1.gpio2_20", AM33XX_PULL_ENBL}, /* Exp1 TX EN */
|
175 |
|
{"mii1_txclk.gpio3_9", AM33XX_PULL_ENBL}, /* Exp0 TX EN */
|
176 |
|
{NULL, 0}
|
|
185 |
{"uart1_rxd.uart1_rxd", AM33XX_PIN_INPUT_PULLUP},/* Exp0 RX */
|
|
186 |
{"uart1_txd.uart1_txd", AM33XX_PULL_ENBL}, /* Exp0 TX */
|
|
187 |
{"mii1_rxd3.uart1_dtrn", AM33XX_PULL_ENBL}, /* uart 1 modem */
|
|
188 |
{"mii1_rxclk..uart1_dsrn", AM33XX_PULL_ENBL}, /* */
|
|
189 |
{"mii1_txclk.uart1_dcdn", AM33XX_PULL_ENBL}, /* */
|
|
190 |
|
|
191 |
{"spi0_sclk.uart2_rxd", AM33XX_PIN_INPUT_PULLUP},/* Exp0 RX */
|
|
192 |
{"spi0_d0.uart2_txd", AM33XX_PULL_ENBL}, /* Exp0 TX */
|
|
193 |
|
|
194 |
{"spi0_cs1.uart3_rxd", AM33XX_PIN_INPUT_PULLUP},/*- Exp0 RX */
|
|
195 |
{"mii1_rxd2.uart3_txd", AM33XX_PULL_ENBL}, /* - Exp0 TX */
|
|
196 |
|
|
197 |
{"mii1_txd3.uart4_rxd", AM33XX_PIN_INPUT_PULLUP},/* - Exp0 RX */
|
|
198 |
{"mii1_txd2.uart4_txd", AM33XX_PULL_ENBL}, /* Exp0 TX */
|
|
199 |
|
|
200 |
{"lcd_data9.uart5_rxd", AM33XX_PIN_INPUT_PULLUP},/*- Exp0 RX */
|
|
201 |
{"lcd_data8.uart5_txd", AM33XX_PULL_ENBL}, /*- Exp0 TX */
|
|
202 |
{NULL, 0}
|
177 |
203 |
};
|
178 |
204 |
|
|
205 |
|
179 |
206 |
static struct pinmux_config usb_pin_mux[] = {
|
180 |
|
{"usb0_drvvbus.usb0_drvvbus", AM33XX_PIN_OUTPUT},
|
181 |
|
{"usb1_drvvbus.usb1_drvvbus", AM33XX_PIN_OUTPUT},
|
182 |
|
{NULL, 0}
|
|
207 |
{"usb0_drvvbus.usb0_drvvbus", AM33XX_PIN_OUTPUT},
|
|
208 |
{"usb1_drvvbus.usb1_drvvbus", AM33XX_PIN_OUTPUT},
|
|
209 |
{NULL, 0}
|
183 |
210 |
};
|
184 |
211 |
|
185 |
212 |
#if (TS_USE_SPI)
|
186 |
213 |
static struct pinmux_config ts_pin_mux[] = {
|
187 |
|
/* SPI0 CS0 taken care of by SPI pinmux setup */
|
188 |
|
{"xdma_event_intr1.gpio0_20", AM33XX_PIN_INPUT}, /* Pen down */
|
189 |
|
{"xdma_event_intr0.gpio0_19", AM33XX_PIN_INPUT}, /* 7843 busy (not used)*/
|
190 |
|
{NULL, 0}
|
|
214 |
/* SPI0 CS0 taken care of by SPI pinmux setup */
|
|
215 |
{"xdma_event_intr1.gpio0_20", AM33XX_PIN_INPUT}, /* Pen down */
|
|
216 |
{"xdma_event_intr0.gpio0_19", AM33XX_PIN_INPUT}, /* 7843 busy (not used)*/
|
|
217 |
{NULL, 0}
|
191 |
218 |
};
|
192 |
219 |
#endif
|
193 |
220 |
|
194 |
221 |
/* Module pin mux for mcasp1 */
|
195 |
222 |
static struct pinmux_config mcasp1_pin_mux[] = {
|
196 |
|
{"mcasp0_aclkr.mcasp1_aclkx", AM33XX_PIN_INPUT_PULLDOWN},
|
197 |
|
{"mcasp0_fsr.mcasp1_fsx", AM33XX_PIN_INPUT_PULLDOWN},
|
198 |
|
{"mcasp0_axr1.mcasp1_axr0", AM33XX_PIN_OUTPUT},
|
199 |
|
{"mcasp0_ahclkx.mcasp1_axr1", AM33XX_PIN_INPUT_PULLDOWN},
|
200 |
|
{"mii1_rxd0.mcasp1_ahclkr", AM33XX_PIN_INPUT_PULLDOWN},
|
201 |
|
{"rmii1_refclk.mcasp1_ahclkx", AM33XX_PIN_INPUT_PULLDOWN},
|
202 |
|
{NULL, 0},
|
|
223 |
{"mcasp0_aclkr.mcasp1_aclkx", AM33XX_PIN_INPUT_PULLDOWN},
|
|
224 |
{"mcasp0_fsr.mcasp1_fsx", AM33XX_PIN_INPUT_PULLDOWN},
|
|
225 |
{"mcasp0_axr1.mcasp1_axr0", AM33XX_PIN_OUTPUT},
|
|
226 |
{"mcasp0_ahclkx.mcasp1_axr1", AM33XX_PIN_INPUT_PULLDOWN},
|
|
227 |
{"mii1_rxd0.mcasp1_ahclkr", AM33XX_PIN_INPUT_PULLDOWN},
|
|
228 |
{"rmii1_refclk.mcasp1_ahclkx", AM33XX_PIN_INPUT_PULLDOWN},
|
|
229 |
{NULL, 0},
|
203 |
230 |
};
|
204 |
231 |
|
205 |
232 |
|
206 |
233 |
static struct pinmux_config i2c0_pin_mux[] = {
|
207 |
|
{"i2c0_sda.i2c0_sda", AM33XX_SLEWCTRL_SLOW | AM33XX_PULL_ENBL |
|
208 |
|
AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT},
|
209 |
|
{"i2c0_scl.i2c0_scl", AM33XX_SLEWCTRL_SLOW | AM33XX_PULL_ENBL |
|
210 |
|
AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT},
|
211 |
|
{NULL, 0},
|
|
234 |
{"i2c0_sda.i2c0_sda", AM33XX_SLEWCTRL_SLOW | AM33XX_PULL_ENBL |
|
|
235 |
AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT},
|
|
236 |
{"i2c0_scl.i2c0_scl", AM33XX_SLEWCTRL_SLOW | AM33XX_PULL_ENBL |
|
|
237 |
AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT},
|
|
238 |
{NULL, 0},
|
212 |
239 |
};
|
213 |
240 |
|
214 |
241 |
static struct pinmux_config spi0_pin_mux[] = {
|
215 |
|
{"spi0_cs0.spi0_cs0", AM33XX_PIN_OUTPUT_PULLUP},
|
216 |
|
{"spi0_cs1.spi0_cs1", AM33XX_PIN_OUTPUT_PULLUP},
|
217 |
|
{"spi0_sclk.spi0_sclk", AM33XX_PIN_OUTPUT_PULLUP},
|
218 |
|
{"spi0_d0.spi0_d0", AM33XX_PIN_OUTPUT},
|
219 |
|
{"spi0_d1.spi0_d1", AM33XX_PULL_ENBL | AM33XX_INPUT_EN},
|
220 |
|
{NULL, 0},
|
|
242 |
{"spi0_cs0.spi0_cs0", AM33XX_PIN_OUTPUT_PULLUP},
|
|
243 |
{"spi0_cs1.spi0_cs1", AM33XX_PIN_OUTPUT_PULLUP},
|
|
244 |
{"spi0_sclk.spi0_sclk", AM33XX_PIN_OUTPUT_PULLUP},
|
|
245 |
{"spi0_d0.spi0_d0", AM33XX_PIN_OUTPUT},
|
|
246 |
{"spi0_d1.spi0_d1", AM33XX_PULL_ENBL | AM33XX_INPUT_EN},
|
|
247 |
{NULL, 0},
|
221 |
248 |
};
|
222 |
249 |
|
223 |
250 |
|
224 |
251 |
static struct pinmux_config tsc_pin_mux[] = {
|
225 |
|
{"ain0.ain0", AM33XX_INPUT_EN},
|
226 |
|
{"ain1.ain1", AM33XX_INPUT_EN},
|
227 |
|
{"ain2.ain2", AM33XX_INPUT_EN},
|
228 |
|
{"ain3.ain3", AM33XX_INPUT_EN},
|
229 |
|
{"vrefp.vrefp", AM33XX_INPUT_EN},
|
230 |
|
{"vrefn.vrefn", AM33XX_INPUT_EN},
|
231 |
|
{NULL, 0},
|
|
252 |
{"ain0.ain0", AM33XX_INPUT_EN},
|
|
253 |
{"ain1.ain1", AM33XX_INPUT_EN},
|
|
254 |
{"ain2.ain2", AM33XX_INPUT_EN},
|
|
255 |
{"ain3.ain3", AM33XX_INPUT_EN},
|
|
256 |
{"vrefp.vrefp", AM33XX_INPUT_EN},
|
|
257 |
{"vrefn.vrefn", AM33XX_INPUT_EN},
|
|
258 |
{NULL, 0},
|
232 |
259 |
};
|
233 |
260 |
|
234 |
261 |
static struct pinmux_config wl12xx_pin_mux[] = {
|
235 |
|
{"gpmc_ad10.gpio0_26", AM33XX_PIN_INPUT}, /* WL WL IRQ */
|
236 |
|
{"gpmc_ad11.gpio0_27", AM33XX_PIN_INPUT}, /* WL SPI I/O RST */
|
237 |
|
{"gpmc_csn1.gpio1_30", AM33XX_PIN_INPUT_PULLUP}, /* WL IRQ */
|
238 |
|
{"gpmc_csn2.gpio1_31", AM33XX_PIN_OUTPUT}, /* BT RST ?*/
|
239 |
|
{NULL, 0},
|
|
262 |
{"gpmc_ad10.gpio0_26", AM33XX_PIN_INPUT}, /* WL WL IRQ */
|
|
263 |
{"gpmc_ad11.gpio0_27", AM33XX_PIN_INPUT}, /* WL SPI I/O RST */
|
|
264 |
{"gpmc_csn1.gpio1_30", AM33XX_PIN_INPUT_PULLUP}, /* WL IRQ */
|
|
265 |
{"gpmc_csn2.gpio1_31", AM33XX_PIN_OUTPUT}, /* BT RST ?*/
|
|
266 |
{NULL, 0},
|
240 |
267 |
};
|
241 |
268 |
|
242 |
|
#define AM335XEVM_WLAN_IRQ_GPIO GPIO_TO_PIN(0, 26)
|
|
269 |
#define AM335XEVM_WLAN_IRQ_GPIO GPIO_TO_PIN(0, 26)
|
243 |
270 |
|
244 |
271 |
struct wl12xx_platform_data am335x_wlan_data = {
|
245 |
|
.irq = OMAP_GPIO_IRQ(AM335XEVM_WLAN_IRQ_GPIO),
|
246 |
|
.board_ref_clock = WL12XX_REFCLOCK_38_XTAL, /* 38.4Mhz */
|
|
272 |
.irq = OMAP_GPIO_IRQ(AM335XEVM_WLAN_IRQ_GPIO),
|
|
273 |
.board_ref_clock = WL12XX_REFCLOCK_38_XTAL, /* 38.4Mhz */
|
247 |
274 |
};
|
248 |
275 |
|
249 |
276 |
static struct omap2_hsmmc_info mmc_info[] __initdata = {
|
250 |
|
{
|
251 |
|
.mmc = 1,
|
252 |
|
.caps = MMC_CAP_4_BIT_DATA,
|
253 |
|
.gpio_cd = GPIO_TO_PIN(3, 3),
|
254 |
|
.gpio_wp = GPIO_TO_PIN(3, 0),
|
255 |
|
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
|
256 |
|
},
|
257 |
|
{
|
258 |
|
.mmc = 0, /* will be set at runtime */
|
259 |
|
},
|
260 |
|
{
|
261 |
|
.mmc = 0, /* will be set at runtime */
|
262 |
|
},
|
263 |
|
{} /* Terminator */
|
264 |
|
};
|
|
277 |
{
|
|
278 |
.mmc = 1,
|
|
279 |
.caps = MMC_CAP_4_BIT_DATA,
|
|
280 |
.gpio_cd = -EINVAL, // GPIO_TO_PIN(3, 3),
|
|
281 |
.gpio_wp = -EINVAL, //GPIO_TO_PIN(3, 0),
|
|
282 |
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
|
|
283 |
},
|
|
284 |
{
|
|
285 |
.mmc = 0, /* will be set at runtime */
|
|
286 |
},
|
|
287 |
{
|
|
288 |
.mmc = 0, /* will be set at runtime */
|
|
289 |
},
|
|
290 |
{} /* Terminator */
|
|
291 |
};
|
265 |
292 |
|
266 |
293 |
static __init void baseboard_setup_expansion(void)
|
267 |
294 |
{
|
268 |
|
setup_pin_mux(expansion_pin_mux);
|
|
295 |
setup_pin_mux(expansion_pin_mux);
|
269 |
296 |
}
|
270 |
297 |
|
271 |
298 |
static __init void baseboard_setup_can(void)
|
272 |
299 |
{
|
273 |
|
setup_pin_mux(can_pin_mux);
|
|
300 |
setup_pin_mux(can_pin_mux);
|
274 |
301 |
|
275 |
|
am33xx_d_can_init(0);
|
276 |
|
am33xx_d_can_init(1);
|
|
302 |
am33xx_d_can_init(0);
|
|
303 |
am33xx_d_can_init(1);
|
277 |
304 |
}
|
278 |
305 |
|
279 |
306 |
static struct omap_musb_board_data board_data = {
|
280 |
|
.interface_type = MUSB_INTERFACE_ULPI,
|
281 |
|
.mode = MUSB_OTG,
|
282 |
|
.power = 500,
|
283 |
|
.instances = 1,
|
|
307 |
.interface_type = MUSB_INTERFACE_ULPI,
|
|
308 |
.mode = MUSB_OTG,
|
|
309 |
.power = 500,
|
|
310 |
.instances = 1,
|
284 |
311 |
};
|
285 |
312 |
|
286 |
313 |
static __init void baseboard_setup_usb(void)
|
287 |
314 |
{
|
288 |
|
setup_pin_mux(usb_pin_mux);
|
289 |
|
usb_musb_init(&board_data);
|
|
315 |
setup_pin_mux(usb_pin_mux);
|
|
316 |
usb_musb_init(&board_data);
|
290 |
317 |
}
|
291 |
318 |
|
292 |
319 |
static __init void baseboard_setup_mmc(void)
|
293 |
320 |
{
|
294 |
|
/* pin mux */
|
295 |
|
setup_pin_mux(mmc0_pin_mux);
|
|
321 |
/* pin mux */
|
|
322 |
setup_pin_mux(mmc0_pin_mux);
|
296 |
323 |
|
297 |
|
/* configure mmc */
|
298 |
|
omap2_hsmmc_init(mmc_info);
|
|
324 |
/* configure mmc */
|
|
325 |
omap2_hsmmc_init(mmc_info);
|
299 |
326 |
}
|
300 |
327 |
|
301 |
328 |
static const struct display_panel disp_panel = {
|
302 |
|
WVGA, /* panel_type */
|
303 |
|
32, /* max_bpp */
|
304 |
|
16, /* min_bpp */
|
305 |
|
COLOR_ACTIVE, /* panel_shade */
|
|
329 |
WVGA, /* panel_type */
|
|
330 |
32, /* max_bpp */
|
|
331 |
16, /* min_bpp */
|
|
332 |
COLOR_ACTIVE, /* panel_shade */
|
306 |
333 |
};
|
307 |
334 |
|
308 |
335 |
static struct lcd_ctrl_config dvi_cfg = {
|
309 |
|
.p_disp_panel = &disp_panel,
|
310 |
|
.ac_bias = 255,
|
311 |
|
.ac_bias_intrpt = 0,
|
312 |
|
.dma_burst_sz = 16,
|
313 |
|
.bpp = 16,
|
314 |
|
.fdd = 0x80,
|
315 |
|
.tft_alt_mode = 0,
|
316 |
|
.stn_565_mode = 0,
|
317 |
|
.mono_8bit_mode = 0,
|
318 |
|
.invert_line_clock = 1,
|
319 |
|
.invert_frm_clock = 1,
|
320 |
|
.sync_edge = 0,
|
321 |
|
.sync_ctrl = 1,
|
322 |
|
.raster_order = 0,
|
|
336 |
.p_disp_panel = &disp_panel,
|
|
337 |
.ac_bias = 255,
|
|
338 |
.ac_bias_intrpt = 0,
|
|
339 |
.dma_burst_sz = 16,
|
|
340 |
.bpp = 16,
|
|
341 |
.fdd = 0x80,
|
|
342 |
.tft_alt_mode = 0,
|
|
343 |
.stn_565_mode = 0,
|
|
344 |
.mono_8bit_mode = 0,
|
|
345 |
.invert_line_clock = 1,
|
|
346 |
.invert_frm_clock = 1,
|
|
347 |
.sync_edge = 0,
|
|
348 |
.sync_ctrl = 1,
|
|
349 |
.raster_order = 0,
|
323 |
350 |
};
|
324 |
351 |
|
325 |
352 |
/* TODO - should really update driver to support VESA mode timings... */
|
326 |
353 |
struct da8xx_lcdc_platform_data dvi_pdata = {
|
327 |
|
.manu_name = "VESA",
|
328 |
|
.controller_data = &dvi_cfg,
|
329 |
|
.type = "800x600",
|
|
354 |
.manu_name = "VESA",
|
|
355 |
.controller_data = &dvi_cfg,
|
|
356 |
.type = "800x600",
|
330 |
357 |
};
|
331 |
358 |
#ifdef CONFIG_BACKLIGHT_TPS6116X
|
332 |
359 |
|
333 |
360 |
static struct platform_device tps6116x_device = {
|
334 |
|
.name = "tps6116x",
|
335 |
|
.id = -1,
|
336 |
|
.dev = {
|
337 |
|
.platform_data = (void*)MITY335X_DK_GPIO_BACKLIGHT,
|
338 |
|
},
|
|
361 |
.name = "tps6116x",
|
|
362 |
.id = -1,
|
|
363 |
.dev = {
|
|
364 |
.platform_data = (void*)MITY335X_DK_GPIO_BACKLIGHT,
|
|
365 |
},
|
339 |
366 |
};
|
340 |
367 |
#endif /* CONFIG_BACKLIGHT_TPS6116X */
|
341 |
368 |
|
342 |
369 |
|
343 |
370 |
#if (TS_USE_SPI)
|
344 |
371 |
static struct ads7846_platform_data ads7846_config = {
|
345 |
|
.model = 7843,
|
346 |
|
.vref_mv = 3300,
|
347 |
|
.x_max = 0x0fff,
|
348 |
|
.y_max = 0x0fff,
|
349 |
|
.x_plate_ohms = 180,
|
350 |
|
.pressure_max = 255,
|
351 |
|
.debounce_max = 0, //200,
|
352 |
|
.debounce_tol = 5,
|
353 |
|
.debounce_rep = 10,
|
354 |
|
.gpio_pendown = MITY335X_DK_GPIO_TS_IRQ_N,
|
355 |
|
.keep_vref_on = 1,
|
356 |
|
.irq_flags = IRQF_TRIGGER_FALLING,
|
357 |
|
.vref_delay_usecs = 100,
|
358 |
|
.settle_delay_usecs = 200,
|
359 |
|
.penirq_recheck_delay_usecs = 1000,
|
360 |
|
.filter_init = 0,
|
361 |
|
.filter = 0,
|
362 |
|
.filter_cleanup = 0,
|
363 |
|
.gpio_pendown = MITY335X_DK_GPIO_TS_IRQ_N,
|
|
372 |
.model = 7843,
|
|
373 |
.vref_mv = 3300,
|
|
374 |
.x_max = 0x0fff,
|
|
375 |
.y_max = 0x0fff,
|
|
376 |
.x_plate_ohms = 180,
|
|
377 |
.pressure_max = 255,
|
|
378 |
.debounce_max = 0, //200,
|
|
379 |
.debounce_tol = 5,
|
|
380 |
.debounce_rep = 10,
|
|
381 |
.gpio_pendown = MITY335X_DK_GPIO_TS_IRQ_N,
|
|
382 |
.keep_vref_on = 1,
|
|
383 |
.irq_flags = IRQF_TRIGGER_FALLING,
|
|
384 |
.vref_delay_usecs = 100,
|
|
385 |
.settle_delay_usecs = 200,
|
|
386 |
.penirq_recheck_delay_usecs = 1000,
|
|
387 |
.filter_init = 0,
|
|
388 |
.filter = 0,
|
|
389 |
.filter_cleanup = 0,
|
|
390 |
.gpio_pendown = MITY335X_DK_GPIO_TS_IRQ_N,
|
364 |
391 |
};
|
365 |
392 |
|
366 |
393 |
static __init void baseboard_setup_ts(void)
|
367 |
394 |
{
|
368 |
|
setup_pin_mux(ts_pin_mux);
|
369 |
|
/* SPI hookup already done by baseboard_setup_spi0() */
|
|
395 |
setup_pin_mux(ts_pin_mux);
|
|
396 |
/* SPI hookup already done by baseboard_setup_spi0() */
|
370 |
397 |
}
|
371 |
398 |
#else
|
372 |
399 |
|
373 |
400 |
static struct resource tsc_resources[] = {
|
374 |
|
[0] = {
|
375 |
|
.start = AM33XX_TSC_BASE,
|
376 |
|
.end = AM33XX_TSC_BASE + SZ_8K - 1,
|
377 |
|
.flags = IORESOURCE_MEM,
|
378 |
|
},
|
379 |
|
[1] = {
|
380 |
|
.start = AM33XX_IRQ_ADC_GEN,
|
381 |
|
.end = AM33XX_IRQ_ADC_GEN,
|
382 |
|
.flags = IORESOURCE_IRQ,
|
383 |
|
},
|
|
401 |
[0] = {
|
|
402 |
.start = AM33XX_TSC_BASE,
|
|
403 |
.end = AM33XX_TSC_BASE + SZ_8K - 1,
|
|
404 |
.flags = IORESOURCE_MEM,
|
|
405 |
},
|
|
406 |
[1] = {
|
|
407 |
.start = AM33XX_IRQ_ADC_GEN,
|
|
408 |
.end = AM33XX_IRQ_ADC_GEN,
|
|
409 |
.flags = IORESOURCE_IRQ,
|
|
410 |
},
|
384 |
411 |
};
|
385 |
412 |
|
386 |
413 |
static struct tsc_data am335x_touchscreen_data = {
|
387 |
|
.wires = 4,
|
388 |
|
.analog_input = 1,
|
389 |
|
.x_plate_resistance = 200,
|
|
414 |
.wires = 4,
|
|
415 |
.analog_input = 1,
|
|
416 |
.x_plate_resistance = 200,
|
390 |
417 |
};
|
391 |
418 |
|
392 |
419 |
static struct platform_device tsc_device = {
|
393 |
|
.name = "tsc",
|
394 |
|
.id = -1,
|
395 |
|
.dev = {
|
396 |
|
.platform_data = &am335x_touchscreen_data,
|
397 |
|
},
|
398 |
|
.num_resources = ARRAY_SIZE(tsc_resources),
|
399 |
|
.resource = tsc_resources,
|
|
420 |
.name = "tsc",
|
|
421 |
.id = -1,
|
|
422 |
.dev = {
|
|
423 |
.platform_data = &am335x_touchscreen_data,
|
|
424 |
},
|
|
425 |
.num_resources = ARRAY_SIZE(tsc_resources),
|
|
426 |
.resource = tsc_resources,
|
400 |
427 |
};
|
401 |
428 |
|
402 |
429 |
|
403 |
430 |
static __init void baseboard_setup_ts(void)
|
404 |
431 |
{
|
405 |
|
int err;
|
|
432 |
int err;
|
406 |
433 |
|
407 |
|
setup_pin_mux(tsc_pin_mux);
|
408 |
|
err = platform_device_register(&tsc_device);
|
409 |
|
if (err)
|
410 |
|
pr_err("failed to register touchscreen device\n");
|
|
434 |
setup_pin_mux(tsc_pin_mux);
|
|
435 |
err = platform_device_register(&tsc_device);
|
|
436 |
if (err)
|
|
437 |
pr_err("failed to register touchscreen device\n");
|
411 |
438 |
}
|
412 |
439 |
#endif /* CONFIG_TOUCHSCREEN_ADS7846 */
|
413 |
440 |
|
414 |
441 |
static __init void baseboard_setup_dvi(void)
|
415 |
442 |
{
|
416 |
|
struct clk *disp_pll;
|
|
443 |
struct clk *disp_pll;
|
417 |
444 |
|
418 |
|
/* pinmux */
|
419 |
|
setup_pin_mux(lcdc_pin_mux);
|
|
445 |
/* pinmux */
|
|
446 |
setup_pin_mux(lcdc_pin_mux);
|
420 |
447 |
|
421 |
|
/* add I2C1 device entry */
|
|
448 |
/* add I2C1 device entry */
|
422 |
449 |
|
423 |
|
/* TODO - really need to modify da8xx driver to support mating to the
|
424 |
|
* TFP410 and tweaking settings at the driver level... need to stew on
|
425 |
|
* this..
|
426 |
|
*/
|
|
450 |
/* TODO - really need to modify da8xx driver to support mating to the
|
|
451 |
* TFP410 and tweaking settings at the driver level... need to stew on
|
|
452 |
* this..
|
|
453 |
*/
|
427 |
454 |
|
428 |
|
/* configure / enable LCDC */
|
429 |
|
disp_pll = clk_get(NULL, "dpll_disp_ck");
|
430 |
|
if (IS_ERR(disp_pll)) {
|
431 |
|
pr_err("Connect get disp_pll\n");
|
432 |
|
return;
|
433 |
|
}
|
|
455 |
/* configure / enable LCDC */
|
|
456 |
disp_pll = clk_get(NULL, "dpll_disp_ck");
|
|
457 |
if (IS_ERR(disp_pll)) {
|
|
458 |
pr_err("Connect get disp_pll\n");
|
|
459 |
return;
|
|
460 |
}
|
434 |
461 |
|
435 |
|
if (clk_set_rate(disp_pll, 300000000)) {
|
436 |
|
pr_warning("%s: Unable to initialize display PLL.\n",
|
437 |
|
__func__);
|
438 |
|
goto out;
|
439 |
|
}
|
|
462 |
if (clk_set_rate(disp_pll, 300000000)) {
|
|
463 |
pr_warning("%s: Unable to initialize display PLL.\n",
|
|
464 |
__func__);
|
|
465 |
goto out;
|
|
466 |
}
|
440 |
467 |
|
441 |
|
if (am33xx_register_lcdc(&dvi_pdata))
|
442 |
|
pr_warning("%s: Unable to register LCDC device.\n",
|
443 |
|
__func__);
|
|
468 |
if (am33xx_register_lcdc(&dvi_pdata))
|
|
469 |
pr_warning("%s: Unable to register LCDC device.\n",
|
|
470 |
__func__);
|
444 |
471 |
|
445 |
472 |
#ifdef CONFIG_BACKLIGHT_TPS6116X
|
446 |
|
if (platform_device_register(&tps6116x_device))
|
447 |
|
pr_err("failed to register backlight device\n");
|
|
473 |
if (platform_device_register(&tps6116x_device))
|
|
474 |
pr_err("failed to register backlight device\n");
|
448 |
475 |
|
449 |
476 |
#else
|
450 |
|
/* backlight */
|
451 |
|
/* TEMPORARY until driver is ready... just jam it on! */
|
452 |
|
if(0 != gpio_request(MITY335X_DK_GPIO_BACKLIGHT, "backlight control")) {
|
453 |
|
pr_warning("Unable to request GPIO %d\n",MITY335X_DK_GPIO_BACKLIGHT);
|
454 |
|
goto out;
|
455 |
|
}
|
456 |
|
if(0 != gpio_direction_output(MITY335X_DK_GPIO_BACKLIGHT, 1) ){
|
457 |
|
pr_warning("Unable to set backlight GPIO %d ON\n",
|
458 |
|
MITY335X_DK_GPIO_BACKLIGHT);
|
459 |
|
goto out;
|
460 |
|
} else {
|
461 |
|
pr_info("Backlight GPIO = %d\n", MITY335X_DK_GPIO_BACKLIGHT);
|
462 |
|
}
|
|
477 |
/* backlight */
|
|
478 |
/* TEMPORARY until driver is ready... just jam it on! */
|
|
479 |
if(0 != gpio_request(MITY335X_DK_GPIO_BACKLIGHT, "backlight control")) {
|
|
480 |
pr_warning("Unable to request GPIO %d\n",MITY335X_DK_GPIO_BACKLIGHT);
|
|
481 |
goto out;
|
|
482 |
}
|
|
483 |
if(0 != gpio_direction_output(MITY335X_DK_GPIO_BACKLIGHT, 1) ){
|
|
484 |
pr_warning("Unable to set backlight GPIO %d ON\n",
|
|
485 |
MITY335X_DK_GPIO_BACKLIGHT);
|
|
486 |
goto out;
|
|
487 |
} else {
|
|
488 |
pr_info("Backlight GPIO = %d\n", MITY335X_DK_GPIO_BACKLIGHT);
|
|
489 |
}
|
463 |
490 |
#endif // CONFIG_BACKLIGHT_TPS6116X
|
464 |
491 |
out:
|
465 |
|
clk_put(disp_pll);
|
|
492 |
clk_put(disp_pll);
|
466 |
493 |
}
|
467 |
494 |
|
468 |
495 |
|
469 |
496 |
|
470 |
497 |
static u8 am335x_iis_serializer_direction[] = {
|
471 |
|
TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
|
472 |
|
INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
|
473 |
|
INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
|
474 |
|
INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
|
|
498 |
TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
|
|
499 |
INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
|
|
500 |
INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
|
|
501 |
INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
|
475 |
502 |
};
|
476 |
503 |
|
477 |
504 |
static struct snd_platform_data baseboard_snd_data = {
|
478 |
|
.tx_dma_offset = 0x46400000, /* McASP1 */
|
479 |
|
.rx_dma_offset = 0x46400000,
|
480 |
|
.op_mode = DAVINCI_MCASP_IIS_MODE,
|
481 |
|
.num_serializer = ARRAY_SIZE(am335x_iis_serializer_direction),
|
482 |
|
.tdm_slots = 2,
|
483 |
|
.serial_dir = am335x_iis_serializer_direction,
|
484 |
|
.asp_chan_q = EVENTQ_2,
|
485 |
|
.version = MCASP_VERSION_3,
|
486 |
|
.txnumevt = 1,
|
487 |
|
.rxnumevt = 1,
|
|
505 |
.tx_dma_offset = 0x46400000, /* McASP1 */
|
|
506 |
.rx_dma_offset = 0x46400000,
|
|
507 |
.op_mode = DAVINCI_MCASP_IIS_MODE,
|
|
508 |
.num_serializer = ARRAY_SIZE(am335x_iis_serializer_direction),
|
|
509 |
.tdm_slots = 2,
|
|
510 |
.serial_dir = am335x_iis_serializer_direction,
|
|
511 |
.asp_chan_q = EVENTQ_2,
|
|
512 |
.version = MCASP_VERSION_3,
|
|
513 |
.txnumevt = 1,
|
|
514 |
.rxnumevt = 1,
|
488 |
515 |
};
|
489 |
516 |
|
490 |
517 |
static struct omap2_mcspi_device_config spi0_ctlr_data = {
|
491 |
|
.turbo_mode = 0, /* diable "turbo" mode */
|
492 |
|
.single_channel = 1, /* 0: slave, 1: master */
|
493 |
|
.d0_is_mosi = 1, /* D0 is output from 3335X */
|
|
518 |
.turbo_mode = 0, /* diable "turbo" mode */
|
|
519 |
.single_channel = 1, /* 0: slave, 1: master */
|
|
520 |
.d0_is_mosi = 1, /* D0 is output from 3335X */
|
494 |
521 |
};
|
495 |
522 |
|
496 |
523 |
static struct spi_board_info baseboard_spi0_slave_info[] = {
|
497 |
|
{
|
498 |
|
.modalias = "tlv320aic26-codec",
|
499 |
|
.controller_data = &spi0_ctlr_data,
|
500 |
|
.irq = -1,
|
501 |
|
.max_speed_hz = 2000000,
|
502 |
|
.bus_num = 1,
|
503 |
|
.chip_select = 1,
|
504 |
|
.mode = SPI_MODE_1,
|
505 |
|
},
|
|
524 |
{
|
|
525 |
.modalias = "tlv320aic26-codec",
|
|
526 |
.controller_data = &spi0_ctlr_data,
|
|
527 |
.irq = -1,
|
|
528 |
.max_speed_hz = 2000000,
|
|
529 |
.bus_num = 1,
|
|
530 |
.chip_select = 1,
|
|
531 |
.mode = SPI_MODE_1,
|
|
532 |
},
|
506 |
533 |
#if (TS_USE_SPI)
|
507 |
|
{
|
508 |
|
.modalias = "ads7846",
|
509 |
|
.bus_num = MITY335X_DK_SPIBUS_TS,
|
510 |
|
.chip_select = 0,
|
511 |
|
.max_speed_hz = 1500000,
|
512 |
|
.controller_data = &spi0_ctlr_data,
|
513 |
|
.irq = OMAP_GPIO_IRQ(MITY335X_DK_GPIO_TS_IRQ_N),
|
514 |
|
.platform_data = &ads7846_config,
|
515 |
|
}
|
|
534 |
{
|
|
535 |
.modalias = "ads7846",
|
|
536 |
.bus_num = MITY335X_DK_SPIBUS_TS,
|
|
537 |
.chip_select = 0,
|
|
538 |
.max_speed_hz = 1500000,
|
|
539 |
.controller_data = &spi0_ctlr_data,
|
|
540 |
.irq = OMAP_GPIO_IRQ(MITY335X_DK_GPIO_TS_IRQ_N),
|
|
541 |
.platform_data = &ads7846_config,
|
|
542 |
}
|
516 |
543 |
#endif /* TS_USE_SPI */
|
517 |
544 |
};
|
518 |
545 |
|
519 |
546 |
static __init void baseboard_setup_audio(void)
|
520 |
547 |
{
|
521 |
|
pr_info("Configuring audio...\n");
|
522 |
|
setup_pin_mux(mcasp1_pin_mux);
|
523 |
|
am335x_register_mcasp1(&baseboard_snd_data);
|
|
548 |
pr_info("Configuring audio...\n");
|
|
549 |
setup_pin_mux(mcasp1_pin_mux);
|
|
550 |
am335x_register_mcasp1(&baseboard_snd_data);
|
524 |
551 |
}
|
525 |
552 |
|
526 |
553 |
|
527 |
554 |
static __init void baseboard_setup_spi0_devices(void)
|
528 |
555 |
{
|
529 |
|
setup_pin_mux(spi0_pin_mux);
|
530 |
|
spi_register_board_info(baseboard_spi0_slave_info,
|
531 |
|
ARRAY_SIZE(baseboard_spi0_slave_info));
|
|
556 |
setup_pin_mux(spi0_pin_mux);
|
|
557 |
spi_register_board_info(baseboard_spi0_slave_info,
|
|
558 |
ARRAY_SIZE(baseboard_spi0_slave_info));
|
532 |
559 |
|
533 |
|
baseboard_setup_audio();
|
534 |
|
baseboard_setup_ts();
|
|
560 |
baseboard_setup_audio();
|
|
561 |
baseboard_setup_ts();
|
535 |
562 |
|
536 |
563 |
}
|
537 |
564 |
|
538 |
565 |
|
539 |
566 |
static void __init baseboard_i2c0_init(void)
|
540 |
567 |
{
|
541 |
|
setup_pin_mux(i2c0_pin_mux);
|
542 |
|
omap_register_i2c_bus(1, 100, NULL, 0);
|
|
568 |
setup_pin_mux(i2c0_pin_mux);
|
|
569 |
omap_register_i2c_bus(1, 100, NULL, 0);
|
543 |
570 |
}
|
544 |
571 |
|
545 |
572 |
/* fixup for the Vitesse 8601 PHY on the MityARM335x dev kit.
|
... | ... | |
547 |
574 |
*/
|
548 |
575 |
static int am335x_vsc8601_phy_fixup(struct phy_device *phydev)
|
549 |
576 |
{
|
550 |
|
unsigned int val;
|
551 |
|
|
552 |
|
pr_info("am335x_vsc8601_phy_fixup %x here addr = %d\n",
|
553 |
|
phydev->phy_id, phydev->addr);
|
554 |
|
|
555 |
|
/* skew control is in extended register set */
|
556 |
|
if (phy_write(phydev, MII_EXTPAGE, 1) < 0) {
|
557 |
|
pr_err("Error enabling extended PHY regs\n");
|
558 |
|
return 1;
|
559 |
|
}
|
560 |
|
/* read the skew */
|
561 |
|
val = phy_read(phydev, RGMII_SKEW);
|
562 |
|
if (val < 0) {
|
563 |
|
pr_err("Error reading RGMII skew reg\n");
|
564 |
|
return val;
|
565 |
|
}
|
566 |
|
val &= 0x0FFF; /* clear skew values */
|
567 |
|
val |= 0x3000; /* 0 Tx skew, 2.0ns Rx skew */
|
568 |
|
if (phy_write(phydev, RGMII_SKEW, val) < 0) {
|
569 |
|
pr_err("failed to write RGMII_SKEW\n");
|
570 |
|
return 1;
|
571 |
|
}
|
572 |
|
/* disable the extended page access */
|
573 |
|
if (phy_write(phydev, MII_EXTPAGE, 0) < 0) {
|
574 |
|
pr_err("Error disabling extended PHY regs\n");
|
575 |
|
return 1;
|
576 |
|
}
|
577 |
|
return 0;
|
|
577 |
unsigned int val;
|
|
578 |
|
|
579 |
pr_info("am335x_vsc8601_phy_fixup %x here addr = %d\n",
|
|
580 |
phydev->phy_id, phydev->addr);
|
|
581 |
|
|
582 |
/* skew control is in extended register set */
|
|
583 |
if (phy_write(phydev, MII_EXTPAGE, 1) < 0) {
|
|
584 |
pr_err("Error enabling extended PHY regs\n");
|
|
585 |
return 1;
|
|
586 |
}
|
|
587 |
/* read the skew */
|
|
588 |
val = phy_read(phydev, RGMII_SKEW);
|
|
589 |
if (val < 0) {
|
|
590 |
pr_err("Error reading RGMII skew reg\n");
|
|
591 |
return val;
|
|
592 |
}
|
|
593 |
val &= 0x0FFF; /* clear skew values */
|
|
594 |
val |= 0x3000; /* 0 Tx skew, 2.0ns Rx skew */
|
|
595 |
if (phy_write(phydev, RGMII_SKEW, val) < 0) {
|
|
596 |
pr_err("failed to write RGMII_SKEW\n");
|
|
597 |
return 1;
|
|
598 |
}
|
|
599 |
/* disable the extended page access */
|
|
600 |
if (phy_write(phydev, MII_EXTPAGE, 0) < 0) {
|
|
601 |
pr_err("Error disabling extended PHY regs\n");
|
|
602 |
return 1;
|
|
603 |
}
|
|
604 |
return 0;
|
578 |
605 |
}
|
579 |
606 |
|
580 |
607 |
static __init void baseboard_setup_enet(void)
|
581 |
608 |
{
|
582 |
|
/* pinmux */
|
583 |
|
setup_pin_mux(rgmii2_pin_mux);
|
584 |
|
|
585 |
|
/* network configuration done in SOM code */
|
586 |
|
/* PHY address setup? */
|
587 |
|
/* Register PHY fixup to adjust rx clock skew */
|
588 |
|
phy_register_fixup_for_uid(VSC8601_PHY_ID,
|
589 |
|
VSC8601_PHY_MASK,
|
590 |
|
am335x_vsc8601_phy_fixup);
|
|
609 |
/* pinmux */
|
|
610 |
setup_pin_mux(rmii2_pin_mux);
|
|
611 |
|
|
612 |
/* network configuration done in SOM code */
|
|
613 |
/* PHY address setup? */
|
|
614 |
/* Register PHY fixup to adjust rx clock skew */
|
|
615 |
phy_register_fixup_for_uid(VSC8601_PHY_ID,
|
|
616 |
VSC8601_PHY_MASK,
|
|
617 |
am335x_vsc8601_phy_fixup);
|
591 |
618 |
}
|
592 |
619 |
|
593 |
620 |
|
... | ... | |
596 |
623 |
|
597 |
624 |
static void mmc2_wl12xx_init(void)
|
598 |
625 |
{
|
599 |
|
setup_pin_mux(mmc2_pin_mux);
|
600 |
|
|
601 |
|
mmc_info[1].mmc = 3;
|
602 |
|
mmc_info[1].name = "wl1271";
|
603 |
|
mmc_info[1].caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD
|
604 |
|
| MMC_PM_KEEP_POWER;
|
605 |
|
mmc_info[1].nonremovable = true;
|
606 |
|
mmc_info[1].gpio_cd = -EINVAL;
|
607 |
|
mmc_info[1].gpio_wp = -EINVAL;
|
608 |
|
mmc_info[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */
|
609 |
|
|
610 |
|
/* mmc will be initialized when mmc0_init is called */
|
611 |
|
return;
|
|
626 |
setup_pin_mux(mmc2_pin_mux);
|
|
627 |
|
|
628 |
mmc_info[1].mmc = 3;
|
|
629 |
mmc_info[1].name = "wl1271";
|
|
630 |
mmc_info[1].caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD
|
|
631 |
| MMC_PM_KEEP_POWER;
|
|
632 |
mmc_info[1].nonremovable = true;
|
|
633 |
mmc_info[1].gpio_cd = -EINVAL;
|
|
634 |
mmc_info[1].gpio_wp = -EINVAL;
|
|
635 |
mmc_info[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */
|
|
636 |
|
|
637 |
/* mmc will be initialized when mmc0_init is called */
|
|
638 |
return;
|
612 |
639 |
}
|
613 |
640 |
|
614 |
641 |
static void wl12xx_bluetooth_enable(void)
|
615 |
642 |
{
|
616 |
643 |
#if 0
|
617 |
|
int status = gpio_request(am335x_wlan_data.bt_enable_gpio,
|
618 |
|
"bt_en\n");
|
619 |
|
if (status < 0)
|
620 |
|
pr_err("Failed to request gpio for bt_enable");
|
|
644 |
int status = gpio_request(am335x_wlan_data.bt_enable_gpio,
|
|
645 |
"bt_en\n");
|
|
646 |
if (status < 0)
|
|
647 |
pr_err("Failed to request gpio for bt_enable");
|
621 |
648 |
|
622 |
|
pr_info("Configure Bluetooth Enable pin...\n");
|
623 |
|
gpio_direction_output(am335x_wlan_data.bt_enable_gpio, 0);
|
|
649 |
pr_info("Configure Bluetooth Enable pin...\n");
|
|
650 |
gpio_direction_output(am335x_wlan_data.bt_enable_gpio, 0);
|
624 |
651 |
#else
|
625 |
|
pr_info("Bluetooth not Enabled!\n");
|
|
652 |
pr_info("Bluetooth not Enabled!\n");
|
626 |
653 |
#endif
|
627 |
654 |
}
|
628 |
655 |
|
629 |
656 |
static int wl12xx_set_power(struct device *dev, int slot, int on, int vdd)
|
630 |
657 |
{
|
631 |
|
#if 1 /* TJI - 5/24/12 WL enable not connected yet.. always on */
|
632 |
|
if (on) {
|
633 |
|
gpio_set_value(am335x_wlan_data.wlan_enable_gpio, 1);
|
634 |
|
mdelay(70);
|
635 |
|
}
|
636 |
|
else
|
637 |
|
gpio_set_value(am335x_wlan_data.wlan_enable_gpio, 0);
|
|
658 |
#if 1 /* TJI - 5/24/12 WL enable not connected yet.. always on */
|
|
659 |
if (on) {
|
|
660 |
gpio_set_value(am335x_wlan_data.wlan_enable_gpio, 1);
|
|
661 |
mdelay(70);
|
|
662 |
}
|
|
663 |
else
|
|
664 |
gpio_set_value(am335x_wlan_data.wlan_enable_gpio, 0);
|
638 |
665 |
#endif
|
639 |
|
return 0;
|
|
666 |
return 0;
|
640 |
667 |
}
|
641 |
668 |
|
642 |
669 |
static void baseboard_setup_wlan(void)
|
643 |
670 |
{
|
644 |
671 |
|
645 |
|
struct device *dev;
|
646 |
|
struct omap_mmc_platform_data *pdata;
|
647 |
|
int ret;
|
|
672 |
struct device *dev;
|
|
673 |
struct omap_mmc_platform_data *pdata;
|
|
674 |
int ret;
|
648 |
675 |
|
649 |
676 |
|
650 |
|
/* Register WLAN and BT enable pins based on the evm board revision */
|
651 |
|
am335x_wlan_data.wlan_enable_gpio = GPIO_TO_PIN(3,4);
|
652 |
|
am335x_wlan_data.bt_enable_gpio = -EINVAL;
|
|
677 |
/* Register WLAN and BT enable pins based on the evm board revision */
|
|
678 |
am335x_wlan_data.wlan_enable_gpio = GPIO_TO_PIN(3,4);
|
|
679 |
am335x_wlan_data.bt_enable_gpio = -EINVAL;
|
653 |
680 |
|
654 |
681 |
pr_info("WLAN GPIO Info.. IRQ = %3d WL_EN = %3d BT_EN = %3d\n",
|
655 |
|
am335x_wlan_data.irq,
|
656 |
|
am335x_wlan_data.wlan_enable_gpio,
|
657 |
|
am335x_wlan_data.bt_enable_gpio);
|
|
682 |
am335x_wlan_data.irq,
|
|
683 |
am335x_wlan_data.wlan_enable_gpio,
|
|
684 |
am335x_wlan_data.bt_enable_gpio);
|
658 |
685 |
|
659 |
|
wl12xx_bluetooth_enable();
|
660 |
|
|
661 |
|
if (wl12xx_set_platform_data(&am335x_wlan_data))
|
662 |
|
pr_err("error setting wl12xx data\n");
|
663 |
|
|
664 |
|
dev = mmc_info[1].dev;
|
665 |
|
if (!dev) {
|
666 |
|
pr_err("wl12xx mmc device initialization failed\n");
|
667 |
|
goto out;
|
668 |
|
}
|
669 |
|
|
670 |
|
pdata = dev->platform_data;
|
671 |
|
if (!pdata) {
|
672 |
|
pr_err("Platfrom data of wl12xx device not set\n");
|
673 |
|
goto out;
|
674 |
|
}
|
|
686 |
wl12xx_bluetooth_enable();
|
|
687 |
|
|
688 |
if (wl12xx_set_platform_data(&am335x_wlan_data))
|
|
689 |
pr_err("error setting wl12xx data\n");
|
|
690 |
|
|
691 |
dev = mmc_info[1].dev;
|
|
692 |
if (!dev) {
|
|
693 |
pr_err("wl12xx mmc device initialization failed\n");
|
|
694 |
goto out;
|
|
695 |
}
|
|
696 |
|
|
697 |
pdata = dev->platform_data;
|
|
698 |
if (!pdata) {
|
|
699 |
pr_err("Platfrom data of wl12xx device not set\n");
|
|
700 |
goto out;
|
|
701 |
}
|
675 |
702 |
#if 1
|
676 |
|
ret = gpio_request_one(am335x_wlan_data.wlan_enable_gpio,
|
677 |
|
GPIOF_OUT_INIT_LOW, "wlan_en");
|
678 |
|
if (ret) {
|
679 |
|
pr_err("Error requesting wlan enable gpio: %d\n", ret);
|
680 |
|
goto out;
|
681 |
|
}
|
|
703 |
ret = gpio_request_one(am335x_wlan_data.wlan_enable_gpio,
|
|
704 |
GPIOF_OUT_INIT_LOW, "wlan_en");
|
|
705 |
if (ret) {
|
|
706 |
pr_err("Error requesting wlan enable gpio: %d\n", ret);
|
|
707 |
goto out;
|
|
708 |
}
|
682 |
709 |
#endif
|
683 |
|
setup_pin_mux(wl12xx_pin_mux);
|
|
710 |
setup_pin_mux(wl12xx_pin_mux);
|
684 |
711 |
|
685 |
|
pdata->slots[0].set_power = wl12xx_set_power;
|
686 |
|
pr_info("baseboard_setup_wlan: finished\n");
|
|
712 |
pdata->slots[0].set_power = wl12xx_set_power;
|
|
713 |
pr_info("baseboard_setup_wlan: finished\n");
|
687 |
714 |
out:
|
688 |
|
return;
|
|
715 |
return;
|
689 |
716 |
|
690 |
717 |
}
|
691 |
718 |
|
692 |
719 |
|
693 |
720 |
static __init int baseboard_init(void)
|
694 |
721 |
{
|
695 |
|
pr_info("%s [%s]...\n", __func__, BASEBOARD_NAME);
|
|
722 |
pr_info("%s [%s]...\n", __func__, BASEBOARD_NAME);
|
696 |
723 |
|
697 |
|
baseboard_setup_enet();
|
|
724 |
baseboard_setup_enet();
|
698 |
725 |
|
699 |
|
mmc2_wl12xx_init();
|
|
726 |
mmc2_wl12xx_init();
|
700 |
727 |
|
701 |
|
baseboard_setup_mmc();
|
|
728 |
baseboard_setup_mmc();
|
702 |
729 |
|
703 |
|
baseboard_setup_usb();
|
|
730 |
baseboard_setup_usb();
|
704 |
731 |
|
705 |
732 |
|
706 |
|
baseboard_setup_dvi();
|
|
733 |
baseboard_setup_dvi();
|
707 |
734 |
|
708 |
|
baseboard_setup_can();
|
|
735 |
baseboard_setup_can();
|
709 |
736 |
|
710 |
|
baseboard_setup_spi0_devices();
|
|
737 |
baseboard_setup_spi0_devices();
|
711 |
738 |
|
712 |
|
baseboard_i2c0_init();
|
|
739 |
baseboard_i2c0_init();
|
713 |
740 |
|
714 |
|
baseboard_setup_wlan();
|
|
741 |
baseboard_setup_wlan();
|
715 |
742 |
|
716 |
|
baseboard_setup_expansion();
|
|
743 |
baseboard_setup_expansion();
|
717 |
744 |
|
718 |
|
return 0;
|
|
745 |
return 0;
|
719 |
746 |
}
|
720 |
747 |
arch_initcall_sync(baseboard_init);
|
721 |
748 |
|