Mity CPU Platforms » MitySOM-5CSX Altera Cyclone V

Hello,

Unsure whether to post this under the software or FPGA topic.

We are transitioning from a mostly working system developed on the Mitysom5CSX Devkit to a custom carrier board design (Cyclone V, 5CSX-H6-4YA-RC). In the previous system, we had used the I2C3 controller (at 0xffc07000, passed through the FPGA by selecting the FPGA option in Qsys) to communicate with a particular peripheral.

In the new design, we decided to use I2C1 (0xffc05000) on HPS pins (I/O set 0) to communicate with the same peripheral. The pin mux table seems correct and the pin assignments seem to agree with our schematic, at this point checked many times. However, when attempting to write data to the bus, there is absolutely no activity on those pins, and the I2C designware driver gives a "controller timed out". I2C0, which does not leave the SOM, seems to be working fine, even though the I2C1 configuration seems to be almost exactly analogous.

Other I2C controllers on the system passed through the FPGA fabric function as expected. We have checked for possible hardware-level problems such as pull-up value, layout, etc. The SCL and SDA lines sit at 3.3V and never move.

Please assist in choosing next steps for debugging. I would be glad to provide additional information if requested.

Thank you

Harrison Barclay