Activity
From 09/23/2011 to 10/22/2011
10/21/2011
- 02:34 PM Software Development: RE: uPP receive problem
- Mike,
I will attach the upp control settings and dma descriptor settings. I know in the end I want to use the ena...
10/20/2011
- 05:47 PM Software Development: RE: uPP receive problem
- On the MityDSP-L138F, the voltage domain for the UPP (and for the FPGA bank connected to the UPP) is 1.8 Volts.
I'... - 04:56 PM Software Development: RE: uPP receive problem
- Tom,
I understand the handshaking can be a problem. I have the uPP running with the highest divisor now at ~4.68 ... - 01:23 PM Software Development: RE: uPP receive problem
- Hi Scott -
Thanks for posting.
I talked to the guys about this problem that you're having. It sounds like any... - Hello,
I am writing a linux uPP driver for bi-directional comms between the fpga and OMAP. From what I can tell t... - 03:11 PM Software Development: RE: Using dspQDMA library on OMAP-L138
- Great! Thanks very much guys. This should get me on the right track.
- 12:41 PM Software Development: RE: Using dspQDMA library on OMAP-L138
- Mike and I apparently were typing simultaneously! Good thing we both came up with the same answer!
Dave
- 12:40 PM Software Development: RE: Using dspQDMA library on OMAP-L138
- Typically, we kick off the DMA from an ISR and pend for it in a task. Pending from within an ISR is not allowed. You...
- 12:35 PM Software Development: RE: Using dspQDMA library on OMAP-L138
- If you are calling SEM_pend() from within an ISR, you need to use a zero timeout. You could do a ...
- 12:16 PM Software Development: RE: Using dspQDMA library on OMAP-L138
- If I did want to be sure that the operation had completed before moving on, is there an alternative approach. In this...
- 12:15 PM Software Development: RE: Using dspQDMA library on OMAP-L138
- Hi Mike,
I will check on the initialization value. I was calling the SEM_pend function immediately after requesting ...
10/19/2011
- 12:38 PM Software Development: RE: Using dspQDMA library on OMAP-L138
- Hi Richard,
How are you creating the Semaphore? Zero initialization value?
Is it possible your routine that is... - I am using the dspQDMA class in a project on the mity-omap processor. I was able to successfully load all of the comp...
10/12/2011
- 04:01 PM Software Development: RE: HelloWorldDSP.out syntax error
- Hi Peter,
Thank you for your feedback. We'll try to update the Hello World page and address your comments. The c... - 03:19 PM Software Development: Reflections after building DSP "Hello, world!"
- I managed to compile the DSP Hello World...*finally*.
(Using Version: 4.2.4.00033 of CCS on WinXP)
I noticed a ... - Hello,
We are trying to debug a uPP application and routed the chan A and Chan B signals through the fpga to conne...
10/10/2011
- 03:36 PM Software Development: RE: HelloWorldDSP.out syntax error
- those binaries were a great sanity check for me. you guys might consider posting them to the quick start page.
Mike
10/06/2011
- Hi,
After transferring the jffs2 filesystem via uBoot, using the "nand write.jffs2 C2000000 0 <>" command, is there...
10/03/2011
- 03:48 PM Software Development: RE: uPP digital loopback
- Greg,
I'm using the default ASYNCH3 clock which is PLL_SYSCLK1 I think. This should be divided down automatically... - 01:49 PM Software Development: RE: uPP digital loopback
- Hi Scott,
As far as I know we have not seen any issue like what you're describing when using a uPP clock driven by... - Hello,
I have a linux driver module to test the uPP in digital loopback. I saw some odd behavior in regards to th...
09/30/2011
- 06:30 AM Software Development: RE: Additional serial port on the MityDSP Profibus dev-kit
- Just thought I'd add a note in case some one else stumbles upon this thread:
Ended up using a Prolific usb-to-seri...
09/29/2011
- Are there test points available on the MityDSP-L138F for the following uPP signals?
'UPP_CHA_ENABLE' = L138 Pin#U1... - 10:40 AM Software Development: RE: upp clock
- Greg,
Thanks for the reply. My question was more of how the clocks are setup on the board as a default. I suspec... - 08:30 AM Software Development: RE: Additional serial port on the MityDSP Profibus dev-kit
- No, I don't think ssh would work. It has to be something I could open and interact with just like a com port from my ...
- 08:18 AM Software Development: RE: Additional serial port on the MityDSP Profibus dev-kit
- (re: comm over ethernet)
Is ssh acceptable? "ssh root@mitydspaddr"
-Mike
- 08:17 AM Software Development: RE: Additional serial port on the MityDSP Profibus dev-kit
- The default kernel and root filesystem may "just work". If you plug in the device you should see some messages about...
- 08:13 AM Software Development: RE: Additional serial port on the MityDSP Profibus dev-kit
- Hmm, I don't really need a physical port. Is there any com over ethernet software availible for these systems?
/ M... - 08:10 AM Software Development: RE: Additional serial port on the MityDSP Profibus dev-kit
- Thanks for the speedy reply!
One extra port should suffice. I'll order one of the keyspan adapters right away.
... - 07:49 AM Software Development: RE: Additional serial port on the MityDSP Profibus dev-kit
- Hi Mattias,
I think that your best (or easiest) bet would be to use a usb-to-serial adapter on the Host (USB1) por... - Hi, I'm wondering what the best way to get an additional serial port is? Is there support for usb-to-serial adapters?...
09/28/2011
- 04:35 PM Software Development: RE: upp clock
- Hi Scott,
The fastest you will be able to get the uPP transmit clock to run with your setup is 75 MHz.
From th...
09/27/2011
- I have a userspace upp driver that I am trying to test in loopback mode. I am trying to loopback 1 line of a memory ...
09/23/2011
- We are looking at getting the L138-FI-225-RC that comes with a Spartan 6SLX45. What is the complete FPGA part number ...
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