Activity
From 08/15/2012 to 09/13/2012
09/13/2012
- 02:43 PM Software Development: RE: Problem with uPP in DLB
- Greg,
You was right on and you make my day!
Now, I have another question regarding the cache. I used the uPP in... - 02:24 PM Software Development: RE: Problem with uPP in DLB
- Hi François,
We have not done any work with running the system in digital loopback mode. The fact that you are ge... - I am trying to use uPP in DLP mode with an MityDSP1810F board but my rx buffer is still empty after a "ransaction.
...
09/12/2012
- We are using uPP in our design - UPP XDx signals & BOOT function are muxed, what must I do?
- I am actually design an eval board using your L138 module. I am wondering if I need to care about the BOOT pins (muxe...
09/11/2012
- We need to switch power off to the entire card based on USB activity.
Any easy way to do this?
Also how long is... - 03:27 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- It's the same thing. It got branded with two names early on. Profibus really only works with the MityARM-1810, as t...
- 02:38 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- I guess now is a good time to ask, I'm not sure industrial I/O devkit or the PROFIBUS Development Kit, or if there is...
- 12:07 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Matt,
All of the images on the example site are for an LX16, which (I thought) was the standard size FPGA for m... - 11:56 AM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- *Edit*
The board acually says REV A, not sure if it matters. - 11:52 AM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Ok, thanks Mike. I'll be sure to check out the newer branches. I was able to get fpga_ctrl to load using the uimage f...
- 07:23 AM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Matt,
There are several branches on our git server. The "master" is somewhat older, which is your 2.6.34-rc1. ... - 02:00 PM PCB Development: RE: Usage of GP0 pins on MityDSP-L138F (Posted on behalf of a Customer)
- The "datasheet":http://www.mitydsp.com/images/upload/File/MityDSP-L138F%20Spec.pdf for the MityDSP-L138F contains thi...
- My programmers need to know:
What (if anything) is connected to the GPIO pins on port GP0 onboard the MityDSP-L138F ...
09/10/2012
- 10:05 AM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Mike,
If I understand what I am doing correctly, I am using version 2.6.34-rc1 and I got the kernal from git://...
09/07/2012
- 06:40 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Matt,
The error messages you are getting are from the kernel module files not being compiled against the same v... - Hi,
I've been working with our MityDSP L138F and devolopment board for a few days, today I tried to follow the ins... - 09:49 AM Software Development: RE: kernel build
- duh, I guess it helps to execute the instructions you guys post. After tftp'ing the new kernel I would just type boo...
09/06/2012
- 05:59 PM Software Development: RE: kernel build
- Scott may have found the issue ... he is going to verify and re-post ...
- Hello, I am trying to build the kernel to support EXT4 filesystems. I have downloaded the latest configuration MDK_2...
09/05/2012
- 03:03 PM Software Development: RE: L138 SD Card Boot & AISgen
- I don't have a bunch of time to wander off on this, but you might check the the DEVICE_INIT() routine of the $MDK/sw/...
- 02:44 PM Software Development: RE: L138 SD Card Boot & AISgen
- Hi Mike,
Thanks for getting back to me so quickly.
We are indeed using a non-FPGA SOM. We have DIP switches on ... - 01:15 PM Software Development: RE: L138 SD Card Boot & AISgen
- Hi Richard,
Can you confirm you using a SOM without an FPGA?
FPGA based SOMs do not expose the bootmode / boo... - Hi,
We're trying to create an SD card that contains both u-boot and our Linux kernel for an L138 module. We've now...
09/04/2012
- 04:32 PM FPGA Development: RE: Voltage of bank 3 on MityARM 1810F
- Thanks for the quick reply!
- 04:16 PM FPGA Development: RE: Voltage of bank 3 on MityARM 1810F
- No that is a typo in the UCF file. The voltage is really 1.8V.
Those lines in the UCF should be as shown below.... - 03:58 PM FPGA Development: RE: Voltage of bank 3 on MityARM 1810F
- Are these lines truly connect to the AM1808 as implied in the UCF?
- I started my FPGA code using fpga/vhdl/MityDSP_L138.ucf
I want to add to the design io_gp8(15 downto 8).
These line...
08/31/2012
- 09:58 AM Software Development: RE: Debugging DSP in VirtualBox?
- The Spectrum Digital XDS510 USB emulator pod does not seem to be useable from within the current Oracle VirtualBox.
...
08/30/2012
I followed the procedures of "Installing Open Embedded Core", no problem from step 1 to 4, but at step 5, there's n...
08/28/2012
- 07:08 AM PCB Development: RE: MMCSD
- Sorry, I meant GPIO_0[6 or 7 or 13 or 15] as they are on the J700 connector along with MMCSD0...
- 04:16 AM PCB Development: RE: MMCSD
- Ah yes, that makes sense - I forgot about the degree of pin muxing going on in the L138 and the UPP would make sense ...
08/27/2012
- 07:06 PM PCB Development: RE: Used EMIFA-Signals/Pins
- Yes, there should be several.
The only interface on the EMA on the modules with non-FPGA pins is the NAND (x8, but... - 06:48 PM PCB Development: RE: Used EMIFA-Signals/Pins
- This is the mainquestion: Are there some not used Pins of the EMA interface which i can use as GPIO and keep the onbo...
- 11:13 AM Software Development: RE: Vision Development Kit - What toolchain?
- Any of the ARM side GCC toolchains released should work with the VDK. I would recommend using the most recent one di...
- 10:28 AM PCB Development: RE: MMCSD
- Hello Conor,
Some background: the MMCSD1 was routed through the FPGA because it is pin-muxed with the UPP channel ... - Hi all,
I was looking at interfacing a wireless module to the MMCSD ports on the MityDSP L138F module. There are t...
08/23/2012
- 04:12 PM PCB Development: RE: Used EMIFA-Signals/Pins
- The one without the FPGA.
- 12:42 PM PCB Development: RE: Used EMIFA-Signals/Pins
- For which module? One that includes an FPGA or not?
- Hi,
which EMA-Pins of the EMIFA-Interface already connected to the L138-onboard-peripherials?
I couldn't found an... - 09:05 AM PCB Development: RE: MityDSP-L138F Mounting Holes (Posted on behalf of a customer)
- Mike, thanks for the quick response.
A STEP model is currently available at [http://support.criticallink.com/redmi... - 08:36 AM PCB Development: RE: MityDSP-L138F Mounting Holes (Posted on behalf of a customer)
- We may have a STEP model of the module, let me see if I can get that published.
- 08:35 AM PCB Development: RE: MityDSP-L138F Mounting Holes (Posted on behalf of a customer)
- Short answer is yes, 1.6mm maximum height. And you should probably hold to that height for the entire area below SOM...
- 08:11 AM PCB Development: RE: MityDSP-L138F Mounting Holes (Posted on behalf of a customer)
- The drawing you provided highlights a keep-out area for high profile components. What is the maximum component height...
08/22/2012
- Can JTAG debugging be performed from within CCS running in a VirtualBox?
- What GCC toolchain is used to build the VDK Linux application? DSP?
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