Mity CPU Platforms » MityDSP-L138 (ARM9 Based Platforms)

12/23/2012

09:36 PM Software Development: RE: after update the root-FS and Kernel NFS errors appear at startup

The most recent filesystem involved transitioning from Anstrom 2008 to Angstrom 2012.05, which also migrated from the... Michael Williamson

10:48 AM Software Development: RE: after update the root-FS and Kernel NFS errors appear at startup

To give you more inforamtion about the startup sequence I add the whole log-file of it.
Can it be that there is so... Christian Rückl

09:45 AM Software Development: after update the root-FS and Kernel NFS errors appear at startup

Hi,
I updated the Root-File-System on my module with the Base-FS out of the latest MDK (2012-08-10). I copied also... Christian Rückl

09:28 PM Software Development: RE: DSP Link example not working

Ok,
I will post to your other topic for enabling the network on the newer MDK.
Are you building the example sof... Michael Williamson

03:04 PM Software Development: RE: DSP Link example not working

Mike,
sorry for my really late response....
I was using the factory installed filesystem with the associated ke... Christian Rückl

12/22/2012

07:24 PM Software Development: RE: u-Boot configuration for DSP-Startup

Christian
this page
http://support.criticallink.com/redmine/projects/arm9-platforms/wiki/DSP_Quick_Start
should ... Tim Iskander

07:19 PM Software Development: RE: u-Boot configuration for DSP-Startup

Thank you Tom for your quick answer!
For the moment I have a DSP-only setup but later I want to use both: Linux an... Christian Rückl

07:11 PM Software Development: RE: u-Boot configuration for DSP-Startup

Christian
You can store the DSP image in flash. I am assuming you are running a DSP-only setup (i.e. no linux system... Tim Iskander

04:17 PM Software Development: u-Boot configuration for DSP-Startup

Hi,
At the moment I'm at a point where I don't know how...
I have a DSP-image and want to load it at the startu... Christian Rückl

12/20/2012

09:49 PM FPGA Development: RE: Pinout on L138-FG-225-RC

Michele,
In response to your GPIO bank question:
Yes you can use a single core in the FPGA and have it utilize ... Alexander Block

09:44 PM PCB Development: RE: SATA board connector

Scott,
Just wondering if you found a drop in replacement. We actually just tried doing this on an in-house test fi... Alexander Block

09:39 PM Software Development: RE: tftp access violation

Wade,
I'm going to take a stab in the dark here on a suggestion to give you something to try. If you think you may... Alexander Block

09:26 PM Software Development: RE: The Jtag Interface

If you can wait approximately a week or two Digikey should have them in stock for ordering (http://www.digikey.com/pr... Alexander Block

08:33 PM Software Development: RE: The Jtag Interface

hi mike
I buy a 1808-FX-225-RC. it is without the adapter board. How can I get one？
thanks yilin wang

09:49 AM Software Development: RE: New UBoot Image That Fixes Bootelf Hang When Running Starterware

Sorry for the delay.
The code to support the updated features was checked into our "git server":http://support.cri... Michael Williamson

09:34 AM Software Development: RE: New UBoot Image That Fixes Bootelf Hang When Running Starterware

Was there an official release?
What / where is the latest/greatest? Emmett Bradford

09:41 AM Software Development: RE: PROC_read()

Or.... you can use PROC_read, but you need to build your own synchronization hooks. This is what Greg was alluding t... Michael Williamson

09:40 AM Software Development: RE: PROC_read()

The PROC_read() API is not guarded. It's effectively a memory copy (dealing with the VM addressing under linux).
... Michael Williamson

09:21 AM Software Development: RE: PROC_read()

Greg,
Can you clarify your answer with a bit more detail? Are you saying that the DSP should send a message to the... Wade Calcutt

12/19/2012

02:54 PM Software Development: RE: PROC_read()

Hi Terrence,
What I've seen done here in situations like you are describing is to use the dsplink interfaces and ... Gregory Gluszek

02:45 PM Software Development: RE: PROC_read()

To clarify. I am using Critical Link's API MityDSP::tcDspApp to load the DSP application, configure the shared memor... Terrence Lawrence

12:33 PM Software Development: PROC_read()

I have a shared memory read issue between the ARM and DSP processor that I am trying to resolve. I am using PROC_rea... Terrence Lawrence

12/18/2012

09:38 AM FPGA Development: RE: I2C issues on SLX45

Further - I broke my OLED writes into < 32 bytes each and retested. That works fine and if it was unreliable, the pic... Conor O

08:54 AM FPGA Development: RE: I2C issues on SLX45

Hi guys. Got a chance to test this today. That's a lot better! The i2cdetect scan picks up the device and shows "--" ... Conor O

09:00 AM FPGA Development: RE: Xilinx design suite 14.2 and MDK_2012-08-10

The EMIFA DCM may not be required. If you do not require any other clocks than the 100 MHz (when running at 300 MHz ... Michael Williamson

08:32 AM FPGA Development: RE: Xilinx design suite 14.2 and MDK_2012-08-10

Hmmm. Not sure now because I'm afraid I didn't use the DCM at all! I didn't connect the i_ema_clk directly but via a ... Conor O

08:13 AM FPGA Development: RE: Xilinx design suite 14.2 and MDK_2012-08-10

Dear Conor,
I appreciate your help!
I have the suspect that the component emaclkdcm-Emifa_dcm is a digital cloc... Michele Canepa

05:43 AM FPGA Development: RE: Xilinx design suite 14.2 and MDK_2012-08-10

The learning curve for Xilinx tools is pretty darn steep anyway without jumping in at the deep end!
What *I* did i... Conor O

12/17/2012

05:20 PM Software Development: SYSBIOS & Starterware

Hello,
I'm working to a project with a MityOMAP-L138-FX-225-RC.
Currently, I try to use SYSBIOS into this module... JB B

01:44 PM FPGA Development: RE: Xilinx design suite 14.2 and MDK_2012-08-10

Dear Jean-Pierre,
I am a newbie too in fpga programming: could you please post me a suggestion about the solution?
... Michele Canepa

10:20 AM FPGA Development: RE: I2C issues on SLX45

Scratch that - I see -DDEBUG is in the Makefile :) Conor O

10:17 AM FPGA Development: RE: I2C issues on SLX45

No worries Mike. I used to be a QA guy so I must have a knack for finding these things! Like communicating with a non... Conor O

09:17 AM FPGA Development: RE: I2C issues on SLX45

Hi Conor,
I am updateing (via editing) the patch on the previous post. We've finished some testing here and found... Michael Williamson

12/16/2012

09:04 AM FPGA Development: RE: I2C issues on SLX45

Thanks Mike, I looked at the driver code but wasn't really familiar enough with it to help. I was suspicious somethin... Conor O

12/14/2012

01:46 PM FPGA Development: RE: I2C issues on SLX45

Hi Connor.
I think we may have found the issue. There may be a bug in the linux driver.
If you are OK recompil... Michael Williamson

12/11/2012

08:40 AM Software Development: RE: dsplinkk.ko compatibility

I updated my instructions to clarify the commands on the last post...
-Mike
Michael Williamson

08:34 AM Software Development: RE: dsplinkk.ko compatibility

If you added or removed features from the kernel, you may need to rebuild the dsplink drivers.
To do that:
# s... Michael Williamson

08:09 AM Software Development: RE: dsplinkk.ko compatibility

Michael Williamson wrote:
> There should be a dsplinkk.ko file in the /lib/modules/3.2.0/ directory in the reference... Michele Canepa

12/06/2012

01:51 PM Software Development: RE: Linux DaVinci Video Port Interface (VPIF)

My OMAP-L138 VPIF issue has been resolved! There was a conflict with PINMUX16 and PINMUX17 control register settings... Terrence Lawrence

12:25 PM Software Development: RE: Extremely slow root file system

Thanks Mike for answer.
I forwarded your last comment to our HW engineer.
Chances are I will not get other que... François Tremblay

09:23 AM Software Development: RE: Extremely slow root file system

The approach by your HW designer is fine.
Tri-stating the unused lines that are connected to the EMIFA and IRQ l... Michael Williamson

09:13 AM Software Development: RE: Extremely slow root file system

Mike,
The unused I/O pins in our FPGA design seems to be the culprit.
Here a comment from our hardware engineer... François Tremblay

12/05/2012

03:22 PM Software Development: RE: Extremely slow root file system

Please make sure that any unused IO pins on your FPGA design are "floating" and not "pulled-down" in the bitstream ge... Michael Williamson

01:54 PM Software Development: Extremely slow root file system

Hardware configuration: Industrial IO board + L138-DI-225-RI
We have a FPGA application that transmit data to DSP ... François Tremblay

10:49 AM FPGA Development: RE: I2C issues on SLX45

I dropped the drive strength to 6 on the SCL and SDA lines and it makes a slight difference - not so much ground boun... Conor O

07:20 AM FPGA Development: RE: I2C issues on SLX45

(Busy writing reports instead of doing the work the reports are about!)
For drive strength I was using the Xilinx ... Conor O

12/04/2012

11:29 AM Software Development: RE: Linux DaVinci Video Port Interface (VPIF)

Hi Terrence,
Sorry for the confusion. The linux kernels 2.6.X tracked TI's Platform Support Package releases from... Michael Williamson

09:55 AM Software Development: RE: Linux DaVinci Video Port Interface (VPIF)

I am currently using MDK_2011-12-05 DaVinici Linux kernel to support VPIF on a OMAP-L138F SoM platform. I attempted ... Terrence Lawrence

08:36 AM Software Development: Linux DaVinci Video Port Interface (VPIF)

I need to setup a VPIF interface (ala V4L2) using a Mity OMAP-L138F SoM platform running DaVinci Linux to support, BT... Terrence Lawrence

07:12 AM FPGA Development: RE: I2C issues on SLX45

Hi Conor,
What are you using for drive strength on the FPGA? You might be able to lower the drive strength if the... Michael Williamson

05:50 AM FPGA Development: RE: I2C issues on SLX45

Hi again. It looks like the fpga is doing the right thing but the rise times are just too slow. Er. I guess that's my... Conor O

12/03/2012

10:26 AM FPGA Development: RE: I2C issues on SLX45

Oh and 5K pull ups are to 3.3V on pin J701.38. SDA/SCL read 3.3V, at least on power on they do... Conor O

10:14 AM FPGA Development: RE: I2C issues on SLX45

Thanks Mike. Sure it was evident the generics shouldn't be there and if they are it won't synthesise so it's not much... Conor O

07:14 AM FPGA Development: RE: I2C issues on SLX45

Hello Conor,
For the I2C, you are correct, the generics in the TOP were a carry over from a previous port -- shoul... Michael Williamson

06:09 AM FPGA Development: I2C issues on SLX45

Just one or two questions on the I2C ngc module. The industrialio_top.vhd example code uses a generic map to set cloc... Conor O

08:31 AM Software Development: RE: Using RAM as temporary storage

The 128 MB of Memory is total system memory. Some of it is used for the kernel and application space, but typically ... Michael Williamson

04:23 AM FPGA Development: RE: Pinout on L138-FG-225-RC

Thank you Mike!
Another question: I see that you provide Bank 0 and Bank 1 of the FPGA on the SO-DIMM socket.
Am ... Michele Canepa

12/02/2012

02:59 PM FPGA Development: RE: Pinout on L138-FG-225-RC

Hi Michele,
There is no issue if you are using 6SLX16 FPGAs in any module configuration.
This only a problem wi... Michael Williamson

02:53 PM FPGA Development: RE: Pinout on L138-FG-225-RC

Hello Tom,
the issue is (or was) on the datasheet of the SOM MityDSP
http://www.mitydsp.com/images/upload/File/... Michele Canepa

02:24 PM FPGA Development: RE: Pinout on L138-FG-225-RC

Michele -
Can I ask for a reminder of what that issue is or a pointer to a forum post? I'm unable to locate it at... Thomas Catalino

11:43 AM FPGA Development: Pinout on L138-FG-225-RC

Hello All,
to be sure about the pinout of the SOM L138-FG-225-RC using the FPGA 6SLX16 , I ask if you fixed the issu... Michele Canepa

11/30/2012

10:18 PM Software Development: Using RAM as temporary storage

Posting on behalf of a customer:
Customer wants to store data to the SD card but believes they will be bursting mo... Alexander Block

11/29/2012

05:34 PM FPGA Development: RE: Xilinx design suite 14.2 and MDK_2012-08-10

I found the solution!:) jean-pierre bétend-bon

01:45 PM Software Development: tftp access violation

We've been using an OMAP-L138F SOM that has exhibited no problems until we re-flashed the section containing FPGA bin... Wade Calcutt

11:16 AM Software Development: RE: Cannot Toggle GPIO pin

Thanks for your speedy reply. I'm using 3.2 from the 2012-08-10 MDK. Spencer Mayott

11:14 AM Software Development: RE: Cannot Toggle GPIO pin

Hi Spencer,
The issue is that the MCASP (see baseboard-industrialio.c) setup is configuring that pin to be in AFSR... Michael Williamson

11:04 AM Software Development: RE: Cannot Toggle GPIO pin

Some funky formatting happened with the gpio name. Just for clarification its GPIO 0_13. Spencer Mayott

11:00 AM Software Development: Cannot Toggle GPIO pin

I'm running a MitydspL138 on the Industrial IO board, and I'm trying to set GPIO[0]_13 via echoing directions and val... Spencer Mayott

09:39 AM Software Development: RE: Problems building a rootfile system

Mike,
You are right - it was a config problem. By comparing the config you attached with the default "industial io... Mads Olav le Maire

11/28/2012

01:51 PM Software Development: RE: Problems building a rootfile system

Thanks for the information.
We have at least one active customer using the 3.2 kernel on an Industrial-IO board wi... Michael Williamson

05:30 AM Software Development: RE: Problems building a rootfile system

Hi,
Mike, thanks for your clarification.
I have two sata disks, one SSD which is sata-II (3.0gb) and one old m... Mads Olav le Maire

11/27/2012

04:30 PM FPGA Development: Xilinx design suite 14.2 and MDK_2012-08-10

Hi all,
I am beginner with FPGA programming and want to develop a simple project on my MityDSP-l138F, involving only... jean-pierre bétend-bon

10:39 AM Software Development: RE: Problems building a rootfile system

Hello,
I'm fairly certain that TI submitted the ahci-ti.c stuff originally in their PSP into the mainline and it g... Michael Williamson

09:38 AM Software Development: RE: Problems building a rootfile system

Hi,
Just compared the drivers/ata for kernel version 2.6.34 and 3.2. It seems obvious that the 3.2 branch is lacki... Mads Olav le Maire

11/26/2012

05:17 PM Software Development: RE: helloworld dsplink example

Do not get a chance to exit the application.
here is the log:
root@mityomapl138:/#
root@mityomapl138:/#
roo... Krishna Vallabhaneni

02:49 PM Software Development: Building openembedded-core from scratch : MityDSP overlay breaks meta-toolchain-qte

Hi,
Is there a fix yet for the broken build system?
Would it not be possible to move the open parts to a publi... Phil Sanderson