Mity CPU Platforms » MityDSP-L138 (ARM9 Based Platforms)

05/22/2018

11:12 PM PCB Development: RE: New Design Bringup Question

Hi Alex, a few more details that may be helpful to know. The TI ADC eval board (we used before our board showed up) c... Tom Riddle

09:06 PM PCB Development: RE: New Design Bringup Question

Hi Alex, Thanks again... I'll be able to scope the SPI signals shortly.
So in our design we have an ADC with SPI ... Tom Riddle

06:11 PM PCB Development: RE: New Design Bringup Question

Tom,
Can you comment on J700 concerning the "where" used for +3.3V, SCLK, SIMO and SOMI? I see U901 mentioned for ... Alexander Block

05:47 PM PCB Development: RE: New Design Bringup Question

Tom Riddle wrote:
> Hi Alex,
>
> Thanks, I will get a chance to check the boot sequence is a bit. Now I do not h... Jonathan Cormier

05:34 PM PCB Development: RE: New Design Bringup Question

Hi Alex,
Thanks, I will get a chance to check the boot sequence is a bit. Now I do not have anything on J700 Pin ... Tom Riddle

04:48 PM PCB Development: RE: New Design Bringup Question

Tom,
Sorry for the delay in getting back to you on this issue.
The first step you can take is to see if the Mit... Alexander Block

05/21/2018

03:56 PM FPGA Development: RE: FPGA GPIO issue

Okay thanks Tom. I put that link in the wiki page to hopefully help people in the future. Jonathan Cormier

05/17/2018

07:50 PM PCB Development: New Design Bringup Question

Hi, we have an Industrial I/O board with a Mity-L138F SOM and are bringing up a custom HW design that plugs into it's... Tom Riddle

05/16/2018

03:15 PM FPGA Development: RE: FPGA GPIO issue

Hi Jonathan,
Here's the link
https://support.criticallink.com/redmine/boards/12/topics/2224
It's been a few... Tom Riddle

01:16 PM FPGA Development: RE: FPGA GPIO issue

Can you link to the post? It may help me update the wiki page. Jonathan Cormier

12:05 AM FPGA Development: RE: FPGA GPIO issue

Hi Jonathan, thanks for the info... So I followed an example from a post a few years back (FPGA GPIO: toggle problem)... Tom Riddle

05/15/2018

03:23 PM FPGA Development: RE: FPGA GPIO issue

The fpga can connect the gpio core to any pin you want. Gpio 144 should map to the first gpio core pin in the fpga i... Jonathan Cormier

01:45 AM FPGA Development: FPGA GPIO issue

Hi,
I am attempting to get some FPGA GPIO control going with an L138/LX45 IndustrialIO board. Have been following ... Tom Riddle