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From 12/23/2018 to 01/21/2019

01/17/2019

09:32 AM Software Development: RE: Second PHY MDIO interface
Dan, thanks for your feedback. Lesson learned: Always rebuild the preloader.
That fixed my MDIO issue.
Regarding t...
V J

01/14/2019

05:55 PM Software Development: RE: RGMII pad skew on KSZ9031
Thanks for the reply Mike. I'll talk to the software team and see if VxWorks resets the PHY. If not, then we will try... Shane Avery
11:22 AM Software Development: RE: RGMII pad skew on KSZ9031
Are you using uBoot to boot VxWorks?
I don't think there is enough space in the preloader to include the MDIO driv...
Michael Williamson
04:10 PM Software Development: RE: Second PHY MDIO interface
Hi Vidar,
It looks like you are using Critical Link's 4.9 branch, is that correct?
Have you rebuilt and updated...
Daniel Vincelette
02:36 PM Software Development: Second PHY MDIO interface

Hi
I have added a second PHY to my board and connected it through the FPGA IO. I am using HPS EMAC0 and have added...
V J

01/13/2019

09:55 PM Software Development: RGMII pad skew on KSZ9031
We've got a custom board which is based on CriticalLink's baseboard. The PHY is the 9031. Try as we might to maintain... Shane Avery

01/03/2019

01:35 PM Software Development: RE: MitySOM-5CSX read-only Linux
Thanks a lot Mike.
That does seem to setup the filesystem as read-only, and is quite a simple solution.
Mathew Jones

01/02/2019

09:19 AM Software Development: Duplicated name warnings
Hi
After updating my dts/dtb file I have an issue with the device tree generation. When booting the board I get a lo...
V J
08:27 AM Software Development: RE: LinuxPTP: 1PPS output is running at 0.1Hz
Theses issues are related to the stmmac driver.
See user forum: https://sourceforge.net/p/linuxptp/mailman/linuxptp-...
V J
 

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