Mity CPU Platforms » MitySOM-5CSX Altera Cyclone V

07/08/2025

DV 01:53 PM FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit

Hello,
When you refer to the "binary," are you referring to the RBF file used to program the FPGA? If so, are you observing that the FPGA does not program correctly on the "bad" development kit—specifically, that the orange LED remain... Daniel Vincelette

AF 01:16 PM FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit

Thank you for your response. I’ve updated the clock pin configuration as suggested.
However, I’m currently facing an issue:
I have two MitySOM-5CSX evaluation boards. The binary I want to test is stored on the SD card. It works perfe... Anonymous fpga

07/03/2025

SG 06:31 PM FPGA Development: RE: Unable to program FPGA – “MSEL switch is in the wrong position” on MitySOM-5CSX dev kit

Hello,
We were able to recreate your issue with the app you were using (https://github.com/robseb/rstoolsCY5). After compiling the app and running it on the board as you did, we were able to move past your issue by setting the MSEL sw... Seth Graber

07/02/2025

AF 03:13 PM FPGA Development: Unable to program FPGA – “MSEL switch is in the wrong position” on MitySOM-5CSX dev kit

I’m bringing up our new MitySOM-5CSX evaluation board and ran into an issue while trying to load the reference bitstream that ships with the kit.
1- I copied dev_5cs.rbf to the board via SCP.
2- From the Linux prompt on the board I... Anonymous fpga

MW 03:07 PM FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit

I believe the spreadsheets are correct.
T13 is not connected to a dedicated clock input pin, needed to feed a REFCLK/CLK clock network. It is on pin 155 of the *SOM* connector.
HSMC2_CLK_P driving pin 155 of the *Partial HSMC* con... Michael Williamson

JM 02:42 PM FPGA Development: Clarification regarding LED 4 on MitySOM-5CSX DevKit

I am posting this on behalf of a customer.
I would like to verify that th... Judy Mastracco

06/24/2025

MF 05:54 PM FPGA Development: RE: Tutorial or documentation detailing the setup process specifically on how to load binaries onto the FPGA and HPS parts for executing tasks

I would recommend installing the Quartus version needed for your project onto your build machine (not the virtual machine) following Intel's installation instructions. Once you have the tools installed and can successfully compile the FP... Mike Fiorenza

JM 01:16 PM FPGA Development: Tutorial or documentation detailing the setup process specifically on how to load binaries onto the FPGA and HPS parts for executing tasks

I am posting this on behalf of a customer.

I am currently using your CriticalLink evaluation board, which we acquire... Judy Mastracco