Accessing FPGA Peripherals¶

See memory map here -> http://www.altera.com/literature/hb/arria-v/hps.html

To access FPGA peripherals from uBoot, first reset the appropriate peripheral bridge by clearing 0xFFD0501C (hps.rstmgr.brgmodrst) to 0 (or just the appropriate bit).

Then you can access the peripherals using the usual m* commands from uboot. For instance, for a LWFPGA peripheral connected as a LW AXI slave, the base offset from memory map is 0xFF200000, so accessing a peripheral shown in QSYS as mapped to 0x0000 2000 would be done by reading 0xFF202000. Remember, any register accesses must be word aligned, so to access the second 32 bit register would be 0xFF202004 (base + offset * 4).