FPGA direct DDR memory¶

Some MitySOM-5CSX modules include 256MB or 512MB of FPGA DDR memory that is connected directly to the FPGA.

How to identify a module with this memory¶

Modules with the FPGA DDR memory have either a '2' (256MB of FPGA DDR) or a '3' (512MB of FPGA DDR) in place of the '_' in the following model number field: 5CSX-H6-4_A-RC

Currently our modules use either a Micron MT41K256M8DA-125 (or similar) memory for the 256MB models or a Micron MT41K512M8RH-125 (or similar) memory for the 512MB models.

How does the Cyclone V SX access the FPGA DDR memory¶

The FPGA DDR memory is connected through the FPGA fabric and is interfaced through the use of a "soft" memory controller, "DDR3 SDRAM Controller with UniPHY". The memory is connected to the FPGA in a 8-bit width data bus configuration and in our example project it currently is configured for a 600MHz DDR clock speed.

You may notice that the Cyclone V processors can feature a "Hard Memory Controller" however that feature is not used/available on the MitySOM-5CSX as designed and thus a soft controller is used.

The qsys preset for the DDR3 SDRAM Controller with UniPHY that is configured for the MitySOM-5CSX can be found here: MitySOM-5CSX_256MB_FPGA_DDR.qprs

This present should be copied to your ip/presets folder in the same location as the qsf file, if it does not exist please create it. This preset then can be used from the preset list in the DDR3 SDRAM Controller with UNiPHY setup page.