Mity CPU Platforms

12/11/2014

AB 07:50 PM MitySOM-5CSX Altera Cyclone V FPGA Development: 100MHz Input clock (CLK2 - DDR3) Issue

A customer has the 100MHz DDR3 clock being fed into the module through Pins 117 and 119 on a custom carrier board and is using it to clock some ADC data. However after a little run-time it stops working as noted below: Alexander Block

12/09/2014

OM 06:06 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: DSP/BIOS issue MityDSP-L138

Hi,
Why at programming port UART-1 under a DSP/BIOS (from DSP side) in reply to sending of a binary file on the hyperterminal there is a message:
"<INTERRUPT>
U-Boot >
bdinfo go reset bootm boot bootd iminfo coninfo echo exit ex... Oleh Mela

12/08/2014

JC 04:58 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: mtd->read() returned ECC error

You may have better luck with the latest MDK. MDK_2014-01-13 is the newest.
Download release_2014-01-13.run from https://support.criticallink.com/redmine/projects/arm9-platforms/files
To install:
* Make executable
chmod +x rel... Jonathan Cormier

CC 04:52 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: mtd->read() returned ECC error

MDK_2011-03-31
Chris Coonan

JC 04:51 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: mtd->read() returned ECC error

Which MDK version? Jonathan Cormier

CC 04:48 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: mtd->read() returned ECC error

I am using the mityomap-full.jffs2 supplied with the MDK. I "assumed" the filesize was the number of bytes transferred via tftp. Perhaps that is incorrect.
Chris Coonan

JC 04:44 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: mtd->read() returned ECC error

Chris,
Your flash commands seem reasonable though it is unusual that your file happens to already be exactly 0x800 byte aligned. So perhaps this would be something to investigate, doubtful though.
Its also possible you have some... Jonathan Cormier

CC 03:56 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: mtd->read() returned ECC error

I know this issue was addressed earlier in this forum. I followed the instructions given regarding the need to use the pre-fill memory and write in page sizes to keep the jffs2 filesystem correct. This, however does not seem to solve the... Chris Coonan

11/25/2014

MW 07:46 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Writing to HPS memory

I would recommend contacting your Arrow FAE or Altera for help with the device tree generation / sopcinfo file.
You will need to create a new preloader and uboot and device tree block. You may also need to rebuild the kernel with the... Michael Williamson

VG 07:39 AM MitySOM-5CSX Altera Cyclone V FPGA Development: Writing to HPS memory

Hi,
I'm want to use the hps_ddr_write_example design from critical link and test it on Arrow Terasic Cyclone V SOCKit .
I have changed the device and the HPS DDR3 parameters in the Quartus project.Also I'm using the Arrow kit's DDR3 ... Vidya Govindan

11/24/2014

CC 09:23 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: inotify issue

This is a non-problem. It is working fine. Sorry for the trouble. Chris Coonan

JC 09:12 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: inotify issue

Could you provide some example code that shows the problem you are having? Also need a better explanation of what problem you are seeing.
I am not aware of anyone here who has tried using inotify on the L138, so providing us with a ... Jonathan Cormier

CC 07:31 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: inotify issue

My mistake. Cut and paste error. The kernel is 2.6.34-RC1.
Chris Coonan

11/22/2014

CC 12:09 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: inotify issue

Trying to get inotify to execute properly from inside my application code. I am using linux kernel 2.24-RC1.
Are there any known issues with this, or do I have a configuration problem? Any help greatly appreciated.
Thanks,
Chris... Chris Coonan

11/17/2014

GG 05:16 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA configuration via u-Boot problem

You can also use the promgen command to generate a bin file from a bit:
promgen -w -p bin -u 0 filename.bit -o filename.bin
\Greg Gregory Gluszek

02:35 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Kernel Driver

Hi
I compiled the kernel driver with the Linux kernel in the instruction here (https://support.criticallink.com/redmine/projects/mityarm-5cs/wiki/Linux_Kernel).
Now I'm getting this error:
fpga_uinput: version magic '3.12.0-g456... Anonymous

MW 07:29 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: PlanAhead issue

For ISE (and I think ISE / PlanAhead are still the tools for Spartan 6, as the Vivado tools are for 7 series and higher), if you analyze your design with commercial temp and keep the non-commercial parts within their rated voltages and t... Michael Williamson

OM 03:21 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: PlanAhead issue

Hi,
Why at creation of the project in PlanAhead 14.7 for the chip xc6slx45csg324-3 it is not possible to specify Temp Grade I (only C)? In fact according to the specification on L138-FI-236-RL-ND it works in a range-40°C ~ 70°C.
Best... Oleh Mela

11/14/2014

SK 07:51 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA configuration via u-Boot problem

Hey,
I solved the problem.
It's important that the FPGA config file <fpga>.bin file was created correctly.
By using Xilinx Impact I selected the following options in the "Create PROM file" dialog:
1. Generic Parallel PROM
2. ... Stefan Krassin

SK 07:30 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: FPGA configuration via u-Boot problem

Hi all,
I have a problem with the configuration of the FPGA and booting linux.
I followed the instructions from CL "Using u-Boot to load the FPGA".
If I run the boot command "bootcmd=sf probe 0; sf read 0xc0700000 0x100000 0x280... Stefan Krassin