Mity CPU Platforms

01/06/2015

01:07 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Auto-start script

Hi Jack,
Is your software designed to be executed in linux?
If so then you will need to have linux execute it o... Daniel Vincelette

10:44 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Mounting the backing_file

Hi Paul,
loopback devices are not built into the provided kernel. You will need to either build it in or add it as... Daniel Vincelette

04:28 AM MitySOM-5CSX Altera Cyclone V Software Development: Mounting the backing_file

Ok so the enable-usb script works and my PC sees the storage made available by the dev kit but what is the mount comm... Paul Easton

09:52 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Load FPGA from uboot

Hi Jack,
You would use the *editenv* command.... Daniel Vincelette

01/05/2015

07:08 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Programming the FPGA

Hi
What was the solution to the last problem (add source error)? I get the same warning when trying to add pwm.ngc... Flemming Abrahamsen

04:46 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Load FPGA from uboot

Hi Dan,
How do I change the fpgaimage uboot variable?
Thanks,
Jack Anonymous

04:28 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Load FPGA from uboot

Hi Jack,
That SD card image will automatically load the rbf file that is on the second partition at /home/root/mit... Daniel Vincelette

03:28 PM MitySOM-5CSX Altera Cyclone V FPGA Development: Load FPGA from uboot

Hi,
I tried to follow the instruction in "http://rocketboards.org/foswiki/Documentation/LoadingFPGAFromUBoot".
... Anonymous

02:42 PM MitySOM-5CSX Altera Cyclone V Software Development: Auto-start script

Hi,
I'm trying to have both my FPGA loaded and a software script running on initializing the system.
Any sugges... Anonymous

12/23/2014

06:28 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: Simple Code/Doc for FPGA toggle of GPIO from DSP

Hi im trying to toggle a pin in the FPGA(busy/awake LED would do for now) from the DSP. Is there a doc(howto) describ... stefan nielsen

12/22/2014

06:27 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: DSP/BIOS issue MityDSP-L138

Thank Alex for your answer.
I think a problem was in incorrect PINMUX for UART-1.
My design works fine for UART-0... Oleh Mela

12/18/2014

10:41 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: DSP/BIOS issue MityDSP-L138

Oleh,
Can you please share some more details about this issue if it is still occurring?
It looks to me like Ubo... Alexander Block

12/11/2014

07:50 PM MitySOM-5CSX Altera Cyclone V FPGA Development: 100MHz Input clock (CLK2 - DDR3) Issue

A customer has the 100MHz DDR3 clock being fed into the module through Pins 117 and 119 on a custom carrier board and... Alexander Block

12/09/2014

06:06 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: DSP/BIOS issue MityDSP-L138

Hi,
Why at programming port UART-1 under a DSP/BIOS (from DSP side) in reply to sending of a binary file on the hy... Oleh Mela