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From 11/13/2014 to 12/12/2014

11/21/2014

KM 04:23 PM Support: RE: Pixel Clock B2521
Yes I think it is time to upgrade the FG. Thanks for all the help.
Kyle
Kyle McKinney
MW 04:20 PM Support: RE: Pixel Clock B2521
Hi Kyle,
At the moment, the camera link serializer / pixel clock is fixed at 85 MHz. We would need to make you a custom FPGA image to drop the PLL rate down from 85 to 60. I need to see how complex that would be and get back to you....
Michael Williamson
KM 03:44 PM Support: Pixel Clock B2521
So I finally figure out the problem, my frame grabber can only handle a 60Mhz pixel clock. Is it possible to lower the pixel clock from 85 to 60?
Thanks,
Kyle
Kyle McKinney
KM 03:44 PM Support: RE: B2521 Raw Order and Pixel Packing BASE mode
Alrighty, thank you. Kyle McKinney

11/17/2014

MW 04:00 PM Support: RE: B2521 Raw Order and Pixel Packing BASE mode
Yes, currently base mode works the same in terms of readout order.
It would be possible to add a new mode in firmware to support psuedo single port readouts to support a standard raster order at the cost of reduced framerate (which fo...
Michael Williamson
KM 03:57 PM Support: B2521 Raw Order and Pixel Packing BASE mode
Does BASE mode work similar to 10-Tap mode seen here:
https://support.criticallink.com/redmine/projects/mityvision/wiki/B2521_Raw_Order_and_Pixel_Packing
Kyle McKinney
 

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