Mity CPU Platforms » MitySOM-335x (ARM Cortex-A8 Based Products)

VIO_3P3 is switched on by the SOM after the core voltages to the AM335X are enabled. VIO_3P3 should also be used for the "high" levels on the bootstrap mode pins (LCD_DATA pins).

It is generated using a TPS62290 that is sourcing the input 3.3V, so they will appear (and are) isolated from the input voltage to the module.

-Mike

IN confirming the information in this post I noticed that the 80-000458RC-3 A schematic is not linked correctly on the development kit wiki. It links to the Rev B scehmatic which still shows 3.3V to LCD pin pullups. Does Rev 3 A also show VIO_3P3 to VDDS_HVx pins?

Thanks

I will take a look at the schematics by Friday and update the link as necessary. I believe you are correct...the Rev B and Rev C point to the same schematic.

Sorry about the delay on this issue,

Alex

Hi Mark,

Rev 3 A does not show VIO_3P3 to the VDDS_HVx pins (it still has +3.3 to everything except the LCD pin pullups for the bootstrap mode), but I believe it should. We are in the process of updating the reference schematic to add some R-C termination (in place of the series termination) on the RGMII Tx data lines (from AM335x to PHY) in order to improve some signal margins and are also looking at sequencing the VDDS_HVx pins using the VIO_3P3.

We have not had any issue with power scheme with the remaining VDDS_HVx pins and associated peripherals, but as you may have seen from the AM335x datasheet I think that those supplies really should be sequenced on power up.

I was hoping to have done some testing by now to provide you with more details and post the schematic, but that has been delayed by about a week or so. We've implemented/tested the R-C terminations mentioned above, but the power sequencing testing is waiting on delivery of updated assemblies.

-Mike