HPS/FPGA shared external memory
Added by Maxim Kanevsky 4 days ago
Dear Sir/Madame,
I would like to create my own design based on mitysom-a5e-ref-base, but with shared between HPS/FPGA external memory. The purpose of this is to exchange data between HPS and FPGA. We would like to try this and see if this can work for our project.
In the example design (mitysom-a5e-ref-base) is used by HPS and it is implemented by "hidden" emif_io96b_hps.qsys where I can "dive", but I can't modify it. I'm just trying to add to the AVMM interface to the FPGA User Logic to be able to access to the External Memory. Please see the attached Block Diagram of what I'm trying to implement.
Can you please suggest the easiest way, with minimum modifications of existing example project, or maybe you can share such example if you already have.
Thanks in advance!!
Max
Replies (2)
RE: HPS/FPGA shared external memory - Added by Mike Fiorenza 4 days ago
Hi Max,
Yes, this is possible on the Agilex 5 platform, but the external memory connected to the HPS EMIF is not intended to be modified directly through the hidden emif_io96b_hps.qsys block.
For FPGA logic to exchange data with the HPS through shared external memory, the recommended approach is to access HPS-owned memory through one of the HPS/FPGA bridges:
- FPGA-to-HPS bridge, where FPGA logic accesses memory or peripherals through the HPS address space.
- FPGA-to-SDRAM bridge, where FPGA logic can access the HPS SDRAM region more directly, depending on the system configuration.
These bridges are described in the Agilex 5 Technical Reference Manual:
https://docs.altera.com/r/docs/814346/current
The easiest path with minimum modification to the existing reference design would be to start from our DMA example project. That design already demonstrates FPGA-side logic exchanging data with HPS memory using the FPGA-to-HPS bridge. It should provide a good reference for how to connect the FPGA user logic into the HPS memory path without modifying the hidden HPS EMIF subsystem directly.
So rather than trying to add an AVMM port inside emif_io96b_hps.qsys, we recommend using the existing bridge infrastructure and following the DMA example as the starting point.
- Mike
RE: HPS/FPGA shared external memory - Added by Maxim Kanevsky 4 days ago
Hello Mike,
Thanks a lot for your answer. I've found the same after I posted the question...
Thanks,
Max
