Boot Peripheral Options¶

Module boot configuration pins¶

The MitySOM-335x is capable of booting from a number of peripherals as defined by the state of the 16 LCD_DATA pins at the time of a reset. The state of the 16 data lines is sampled on the rising edge of the power-on-reset signal to determine the search order of peripherals for a valid boot image. The host board needs to provide pull up/down resistors (10K) on the lower 12 bits of the LCD_Data pins to select the desired boot mode for the target application. When a boot mode pin is being pulled up the resistor should utilize the VIO_3P3 voltage output from the MitySOM-335x module to ensure proper read timing. Please refer to the Appendix for a list of the pins that output this voltage net.

Note that bits 15 to 12 are already pulled high/low on the MitySOM-335x module as binary pattern 0100b.

Available Boot Options¶

Attached is the list of available boot peripherals for the AM335x processor. Note that this was pulled from the AM335x TRM (http://www.ti.com/lit/pdf/spruh73).

Note that the SYSBOOT pins, 0 to 4, are responsible for determining the peripheral boot order. Please reference the TRM for further details. These are the first stage boot-loader restrictions. Note that once in UBoot based upon the pin-configuration you could load kernel and file system from any configured interface.

MMC1: eMMC/eSD/managed NAND memory device with 4GB capacity or greater (MMC port 1) - ****CANNOT USE AN SD CARD****
MMC0: MMC/SD Card/eMMC/eSD/managed NAND memory devices with less than 4GB capacity (MMC port 0)
NAND/NANDI2C: NAND flash memory/read geometry from EEPROM on I2C0
XIP: NOR or other XIP device without wait monitoring
XIP w/WAIT: NOR or other XIP device with wait monitoring
MUX1: Boot with XIP_MUX1 signals detailed in Table26-9
MUX2: Boot with XIP_MUX2 signals detailed in Table26-9
UART0: UART interface (UART port 0)
EMAC1: Ethernet interface (EMAC port 1)
SPI0: SPI EEPROM (SPI0,CS0)
USB0: USB interface (USB0)

Note that the onboard SPI EEPROM, if populated, is tied to SPI1 and therefore cannot be used as a direct boot device. A separate on-carrier-board SPI EEPROM would need to be placed for module boot if desired.

Note: The USB0 boot option creates a network RNDIS connection with a PC, it does not allow booting from a flash drive.

Example Boot Configurations¶

The following examples show the pull-up/down state of the boot configuration pins. Again pins 15 to 12 are fixed on the module as '0100'.

To boot from NAND:

BOOTCONFIG [11..0]

11 to 5	4 to 0
0000111	10011

Boot order (from TRM): NAND, NANDI2C, MMC0, UART0

To boot from MMC:

BOOTCONFIG [11..0]

11 to 5	4 to 0
1111111	10111

Boot order (from TRM): MMC0, SPI0, UART0, USB0