Ethernet Phy Selection¶

The MitySOM-335x family of system on modules supports a number of different phy interfaces (RMII, RGMII and GMII). However in modules using TI's AM335x Silicon Revision 1.0 we have found that they did not design the processor to work well with both NAND/GPMC memory and the RMII2 interface. However in Revision 2.0+ of the AM335x silicon they addressed the issue by adding the ability to mux the RMII2_CRS_DV function to two balls (T17 and T13) instead of one.

Available Ethernet Interfaces¶

• RGMII1
• RGMII2
• RMII2 (NAND-less or Rev 2.0+ Silicon)
• GMII2 (NAND-less)

Note that the RMII1 and GMII1 interfaces cannot be used on our MitySOM-335x modules because we use Ball H17 pin for the modules configuration EEPROM I2C1_SDA signal.

10/100/1000 Phys¶

The MitySOM-335x family of modules supports the use of Gigabit phys for all module configurations (with/without NAND).

Recommended Gigabit Phy¶

On our Development Kit we use a Micrel (KSZ9031) RGMII phy. This phy is readily available and we utilize it on the development for our MitySOM-5CSX as well.

10/100 Phy using RMII¶

Currently with Rev 1 silicon AM335x processors from TI it is only possible use the RMII2 interface when the MitySOM-335x NAND memory is NOT populated. This is because the RMII2_CRS_DV signal is muxed on the same ball (T17) as the GPMC_WAIT0 signal which we have connected to the NAND memory on the module. Going forward once TI releases the rev 2.0+ silicon we will immediately be able to support RMII2 since they duplicated the RMII2_CRS_DV function to another ball (T13) on the processor.

Note that the RMII2_RXERR function for RMII2 is still tied to the NAND memory and has not changed in Rev 2.0+ of the Silicon so with NAND memory on our module the RXERR function cannot be used. This should not be an issue as the RXERR function is not required by most RMII phys when using the processor MAC interface, which is the case here.

For a near term solution it is possible as stated to have a MitySOM-335x module containing a Rev 1 silicon processor with RMII2 support as long as the NAND memory is removed. It should be noted that there may be some issue with the trace stub on the rmii2_crs_dv signal from removing the NAND but for proof of concept and/or verification of a carrier board design it should suffice. Please contact Critical Link for further details if you need this solution before the Rev 2 silicon based modules are released.

Recommended 10/100 Phy¶

We recommend the SMSC LAN8710A . There are many others may work, feel free to contact Critical Link to determine compatibility with other Phys.