Activity
From 06/06/2016 to 07/05/2016
06/30/2016
- AB 11:08 AM Software Development: RE: Why do I get a "CALIBRATION FAILED" error during boot?
- Malcolm,
Thanks for catching the typo, it's been updated.
With the CSEL "properly" set and the module still not operating as expected it does still appear that an RMA will still need to be done for us to dig into the issue further.... - MH 03:49 AM Software Development: RE: Why do I get a "CALIBRATION FAILED" error during boot?
- Alex,
Thank you for the reply.
I've checked the "gotchas" wiki page and the CSEL setting was the only thing not correct (and now corrected).
A correction for the Wiki is to change "page 469" to "page 459" three lines up from th... - I downloaded the latest kernel sources from the critical link repo, rebuilt the kernel and .dtb files, and loaded them on the sdcard. Everything works fine except I lost the fpga2hps, hps2fpga, and lwhps2fpga folders under the /sys/clas...
06/29/2016
- AB 10:01 AM Software Development: RE: Why do I get a "CALIBRATION FAILED" error during boot?
- Malcolm,
Dan and Adam brought this issue to my attention and I will followup concerning the RMA replacement via e-mail.
Please note that the current Development Kit Hardware Quickstart Guide (https://support.criticallink.com/redmin... - MH 05:55 AM Software Development: RE: Why do I get a "CALIBRATION FAILED" error during boot?
- I've tried both suggestions but the result is the same, I get the "CALIBRATION FAILED" message on my first board and the second board works.
Can I send the SoM back for a replacement?
Thanks,
Malcolm
06/28/2016
- MH 11:56 AM Software Development: RE: Why do I get a "CALIBRATION FAILED" error during boot?
- Dan,
I've downloaded the file you provided the link for but first ...
Adam,
I presently have CSEL[0-1] set to logic high as per the switch settings of the Critical Link dev board as it was supplied. I now have my own base board ... - AD 11:39 AM Software Development: RE: Why do I get a "CALIBRATION FAILED" error during boot?
- There is a CV errata that can cause such a failure. Please check that the CSEL[0-1] pins are set to "00" to avoid a potential HPS PLL issue.
!MSEL-CSEL-BSEL.png!
Thanks,
Adam - DV 11:13 AM Software Development: RE: Why do I get a "CALIBRATION FAILED" error during boot?
- Hello Malcolm,
I know you said that your current SD card works for one of your SOMs but would you mind trying our prebuilt 5CSX-H6-4YA SD card image just to double check that the SOM that fails RAM calibration still acts the same? It ... - I have been using the same module for the last two weeks and today it has started giving the "CALIBRATION FAILED" error message as listed on the Wiki's ARM Software FAQs page.
06/24/2016
- DV 01:10 PM Software Development: RE: Building BSP for 5cse
- Hi Sam,
I've been able to recreate what you're seeing. It looks like the devicetree generated through yocto is named socfpga_mitysom5cse_devkit.dtb and what uboot is looking for on the SD image that ships with the 5CSE devkit is socfp... - SS 06:41 AM PCB Development: RE: Development Kit 2.5V VIO, change to 3.0 or 3.3
- Thank you Alex, that's exactly what I wanted to know. I understand your point about the warranty, and proceeding carefully.
Best,
Steve
06/23/2016
- AB 04:47 PM PCB Development: RE: Development Kit 2.5V VIO, change to 3.0 or 3.3
- Stephen,
Thanks for reaching out to us about this question.
Please note that making any modification to the carrier board, such as this, will void any warranty for both the carrier board and any module used in that board.
Unfor... - It looks like banks 3B, 4A, and 8A have their I/O voltage tied to a 2.5V supply on the development kit.
If I want to interface with 3.0 or 3.3V logic via the HSMC cards, can I safely modify the feedback resistors on U601 to change the... - DV 12:32 PM Software Development: RE: Building BSP for 5cse
- Hi Sam,
I'm currently re-running the yocto build here to see if I can recreate the issue you are seeing. I will update when I have a result.
Dan - SA 11:36 AM Software Development: RE: Building BSP for 5cse
- Hi Alex,
I selected the 5cse for the build, not the 5csx. I have done this full build no fewer than 3 times with what I believe to be the correct settings, and had consistently non-functional results.
I will try the updated instru... - AB 11:17 AM Software Development: RE: Building BSP for 5cse
- Sam,
I believe that the issue you ran into if following the Yocto wiki steps is that you may have selected the "mitysom-5csx" machine type as shown in the instructions. In your specific case you would actually want to select the "mity...
06/22/2016
- I am trying to follow your documentation for using Yocto to build an image for the 5CSE on the dev board carrier, and having nothing but trouble.
I have followed the exact instructions on your support page, and successfully compiled a...
06/21/2016
- MS 03:45 AM Software Development: RE: How to add aditional HPS GPIO's
- Hi Alex,
Still a few misnumbered things in the above post.
Anyway, removing the switches from the DTS means that the GPIOs don't go to high impedance any more, and whatever I set them to in uBoot persists, but I still can't control...
06/20/2016
- AB 01:15 PM FPGA Development: RE: HDMI Output and Quartus Versions
- Steve,
We have successfully rebuilt the "HDMI example":https://support.criticallink.com/redmine/projects/5csxbase/wiki/HDMI_Output using Quartus 14.1 however you will require a license to support the VIP Suite (Video and Image Process... - Hi,
I noticed that the HDMI Output example you've posted was done in Quartus 15.1 but the VM with the toolchain installed is still on Quartus 14.x. What would you recommend for someone deriving a project from the HDMI example? Shoul... - AB 01:10 PM Software Development: RE: How to add aditional HPS GPIO's
- Maetthew,
Good catch. Apparently when I did the mapping I started off by one. We have updated the post above to have the correct mapping and also the associated wiki page (https://support.criticallink.com/redmine/projects/mityarm-5cs/... - MS 02:09 AM Software Development: RE: How to add aditional HPS GPIO's
- I have noticed that in the DTS the switches are now on the GPIOs that I want to use:
http://support.criticallink.com/gitweb/?p=linux-socfpga.git;a=blob;f=arch/arm/boot/dts/socfpga_mitysom5csx_devkit.dts;hb=refs/heads/socfpga-3.16
I s...
06/19/2016
- MS 11:26 PM Software Development: RE: How to add aditional HPS GPIO's
- I'm having some issues setting GPIO37, 40 and 41 from within Linux.
Firstly, in the instructions above, you mention that GPIO29 to GPIO57 are mapped to gpio198 to gpio226, but then go on to say that GPIO49 corresponds to gpio217. Shou...