Building the QSPI NOR Flash Image 23.1¶
- Table of contents
- Building the QSPI NOR Flash Image 23.1
The MitySOM-5CSx family of modules are capable of booting, running from and accessing the onboard Quad-SPI NOR flash. Depending on the specific module either 16MiB
, 32MiB
, 48MiB
or more QSPI NOR memory may be installed. Once you have loaded U-Boot, you are free to complete system initialization in whatever means fits your design. You can continue to boot and run from NOR using a RAM based filesystem (or flash-based filesystem such as JFFS or UBIFS).
Note: Modules with greater than 16MiB
of NOR memory there will be two individual memory chips installed. The first chip is always 16MiB
in size and uses the QSPI CS0
signal. If present the second memory will be 16MiB
or greater and uses the QSPI CS1
signal. The second memory cannot be used for booting the module but can be accessed from U-Boot for the Kernel and beyond.
Configuration requirements¶
There are several items which all have to be addressed to successfully use the NOR flash:- The
BSEL
pins must be set to0x6
(110b
) since the device uses 1.8V. Note:0x7
(111b
) is for a 3.3V device, so don't use it. - The
CSEL
pins should be set to0x00
- The
MSEL
pins must be strapped to match your desired FPGA configuration. - The preloader must be written to NOR flash at offset
0x0
. - The U-Boot image must be written to NOR flash at the offset specified in the bsp-editor when you created the preloader.
- On modules with more than one QSPI NOR chip, the preloader and U-Boot must reside in the first (
CS0
) chip.
Prerequisites¶
The following files are required:- u-boot-with-spl.sfp
- ubootenv.bin
- socfpga_mitysom5csx_devkit.dtb (The Linux DTB for your respective board)
- zImage
- dev_5cs.rbf
Note: The zImage and DTB will be located in /boot within the filesystem tarball if built with Yocto.
Building the QSPI NOR flash image¶
This is the minimal image contents required to boot U-Boot. Note: Any offset can be chosen for any section as long as the U-Boot environment is configured properly, with the exceptions of the preloader which must be at offset 0x0
and U-Boot which must be at the offset specified in building the Preloader and U-Boot.
Offset | Size | File | Description |
---|---|---|---|
0x00000000 |
0x00100000 |
u-boot-with-spl.sfp |
Four SPL binaries and U-Boot image |
0x00100000 |
0x00010000 |
ubootenv.bin |
U-Boot environment |
0x00110000 |
0x00010000 |
socfpga_mitysom5csx_devkit.dtb |
Linux device tree |
0x00120000 |
0x00600000 |
zImage |
Linux Kernel |
0x00720000 |
<rbf blocks> |
dev_5cs.rbf |
FPGA Binary File |
In order to build the bootloader properly for QSPI, edit the following line in the reference projects Makefile
(ex. mitysom5cs-5csx-ref/dev_5cse_h4_3ya/Makefile
)
- 5CS_DEFCONFIG := socfpga_mitysom5cs_defconfig
+ 5CS_DEFCONFIG := socfpga_mitysom5cs_qspi_defconfig
Programming the QSPI NOR flash¶
- Create an image large enough for all desired sections.
- Minimal image.
dd if=/dev/zero of=image bs=64k count=18
- Full image. Note:
<rbf blocks>
is the size of dev_5cs.rbf divided by64kiB
.dd if=/dev/zero of=image bs=64k count=$((142 + <rbf blocks>))
- Minimal image.
- Copy in the required sections.
dd if=u-boot-with-spl.sfp of=image bs=64k seek=0 count=16 conv=notrunc dd if=ubootenv.bin of=image bs=64k seek=16 count=1 conv=notrunc dd if=socfpga_mitysom5csx_devkit.dtb of=image bs=64k seek=17 count=1 conv=notrunc
- Copy in the optional sections.
dd if=zImage of=image bs=64k seek=18 count=96 conv=notrunc dd if=dev_5cs.rbf of=image bs=64k seek=114 count=<rbf blocks> conv=notrunc
Through U-Boot¶
If you have a first stage boot device on your carrier board such as an SD card you can initially boot the preloader and U-Boot from the SD card and then program the QSPI NOR from U-Boot. This method allows you to access a number of peripherals (Ethernet, SD card, serial, etc.) for transfer of any application image file you wish to write to the QSPI NOR.- Transfer file to memory on the module to then be written to the NOR memory by one of the 3 methods below.
- SD Card
- Store the image on a FAT partition of a bootable SD Card.
- Stop the boot process in U-Boot and load the image from the FAT partition. Note: '
0:1
' is device 0, partition 1.mmc rescan fatload mmc 0:1 2000000 <filename>
- TFTP
- Stop the boot process in U-Boot and load the image from a TFTP server.
tftp 2000000 myserver:/path/to/<filename>
- Stop the boot process in U-Boot and load the image from a TFTP server.
- YModem
- Stop the boot process in U-Boot and load the image over a serial line.
loady 2000000
- Send the image using YMODEM.
- Select the image.
- Example output in U-Boot terminal.
### Ready for binary (ymodem) download to 0x00020000 at 115200 bps... CCxyzModem - CRC mode, 158(SOH)/0(STX)/0(CAN) packets, 6 retries ### Total Size = 0x00004e60 = 20064 Bytes
- Stop the boot process in U-Boot and load the image over a serial line.
- SD Card
- Erase the flash memory area you wish to reprogram. Note: The file address, offset, and size parameters are hexadecimal without the leading
0x
, and$filesize
is automatically set byfatload
.sf probe 0 sf erase 0 $filesize
- Program the image into the flash memory.
sf write 2000000 0 $filesize
Through JTAG¶
If NOR flash is the only boot medium you have, you will have to program the flash before being able to boot the module. To do this you will need to program both the preloader and U-Boot over JTAG initially. Note: Programming over the JTAG can be quite slow.- Connect the USB blaster to the HPS JTAG on the Drive PX board (J2).
- Launch the Quartus Embedded Command Shell.
/opt/intelFPGA/18.1/embedded/embedded_command_shell.sh
- Write the contents of boot_image.bin to the NOR flash at offset
0x0
. Note: This assumes the cable number is 1 (-c 1
). Runjtagconfig
to determine the cable number. Runquartus_hps --help
for help on this command.quartus_hps -c 1 --operation=P boot_image.bin
QSPI NOR access from Linux or a Linux application¶
You can also access the QSPI NOR flash memory from within Linux or a Linux application with the MTD utilities. To enable the QSPI MTD devices, the following kernel config options must be set.
CONFIG_SPI_CADENCE_QSPI
CONFIG_MTD_M25P80
CONFIG_SPI_MASTER && CONFIG_MTD_SPI_NOR
The QSPI partitions must be defined in the device tree (i.e. arch/arm/boot/dts/socfpga_mitysom5cs.dtsi - qspi: spi@ff705000 ...).
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