Activity

From 02/28/2026 to 03/29/2026

05:27 PM MitySOM-C10GX Firmware: RE: CLKUSR - Oscillator Specs?: Hi Sean,
The oscillator that is driving the CLKUSR pin is *KC2520Z100.000C15XXK*. Per the datasheet, this is a 30 ... Mike Fiorenza
05:21 PM MitySOM-C10GX Firmware: CLKUSR - Oscillator Specs?: What is the frequency tolerance and stability (in PPM) of the 100 MHz oscillator used to drive the CLKUSR pin on the ... Sean Youngblood

02:09 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Using WKUP_UART0 in Linux Space: If your able, please jump in and respond to them directly and I'll monitor and i'll jump in as needed. Jonathan Cormier
01:56 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Using WKUP_UART0 in Linux Space: Holden, TI wants to know if you are using the "VPAC/ISP camera functionality on your AM62A7". Presumably to determin... Jonathan Cormier

08:41 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Using WKUP_UART0 in Linux Space: I just responded to your support email but will put my response here as well so others can benifit.
Holden Wozniak... Jonathan Cormier
08:18 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: Using WKUP_UART0 in Linux Space: Hi,
I am having some difficulty bringing up a serial port that utilizes WKUP_UART0 pins. From what I understand, i... Holden Wozniak
05:53 PM MitySBC-Agilex5 FPGA Development: RE: Where can I find the schematic for MitySBC_Agilex5: Thank you Mike.
We currently have SBC and SOM Dev kit. We were told that they are equivalent from FPGA connections p... Eleonora Haralanova

03:46 PM MitySOM-QC6490 Software Development: RE: Long build times: That matches what I'm seeing, although it seems your machine is much faster than mine. For me it's about 7 hours for ... Nathan Olson
02:36 AM MitySOM-QC6490 Software Development: RE: Long build times: Hi Nathan,
We have similar experiences. Unfortunately we do not currently have a fix. We are building off of Qual... Gregory Gluszek
01:26 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Uart issue in Am62P: Thanks for the update Jonathan Cormier
11:44 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Uart issue in Am62P: Hi Jonathan,
The issue was in the code. We have a function that returns an int, but the application was crashing w... Rajkumar Dumala
09:37 AM MitySBC-Agilex5 FPGA Development: RE: Where can I find the schematic for MitySBC_Agilex5: Hi Eleonora,
I was advised that you are working with our "MitySOM-A5E":https://www.criticallink.com/product/mityso... Michael Williamson
02:42 AM MitySOM-QC6490 Software Development: RE: Configuring the QUP pins: Hi Nathan,
Please refer to the [[Configuring the QUP Ports (I2C I3C SPI and UART)]] wiki page which has recently ... Gregory Gluszek

01:51 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Uart issue in Am62P: Thanks for the update. Would you mind sharing what the solution was? Jonathan Cormier
05:44 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Uart issue in Am62P: Hi Jonathan,
I was on a long vacation until recently. The issue has now been fixed.
Best regards,
Rajkumar. Rajkumar Dumala

12:06 AM MitySOM-QC6490 Software Development: Configuring the QUP pins: Hello,
My carrier board uses several QUP pins for I2C, UART, and SPI. How do I configure them? I prefer a device-t... Nathan Olson

06:14 PM MitySOM-QC6490 Software Development: Long build times: Hello,
I am extending the BSP with my own layer. It seems like whenever I make a change, a lot of unrelated files ... Nathan Olson

09:53 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Can't read state of output GPIO pins: Thank you, that would explain it. We ended up setting the pin regardless of the current state. It was an easier chang... Tim Troester

06:05 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Can't read state of output GPIO pins: At least for the AM62x, Pins that need to be read, must be pinmuxed as PIN_INPUT*. The only difference between the P... Jonathan Cormier
05:53 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: Can't read state of output GPIO pins: Hi,
On an AM62x we have a gpio pin (/dev/gpiochip2, line 10) muxed as an output pin. Our application checks the st... Tim Troester

09:46 PM MitySBC-Agilex5 FPGA Development: RE: building FPGA and bootloader: Eleonora,
Our Makefile is currently configured to support Linux. So installing Quartus inside of WSL or a Linux VM... Mike Fiorenza
07:00 PM MitySBC-Agilex5 FPGA Development: building FPGA and bootloader: Hi,
I have Quartus Pro 25.3 with the fix, but it's installed in Windows. If I compile the ref-base project in Window... Eleonora Haralanova

08:51 PM MitySBC-Agilex5 FPGA Development: RE: Where can I find the schematic for MitySBC_Agilex5: Hi Eleonora,
Are you trying to run EP or RP?
The GBTCLK0_M2C_P/N on FMC D4/D5 is run to REFCLK_GSTR4B_CH1p/n (A... Michael Williamson
08:26 PM MitySBC-Agilex5 FPGA Development: RE: Where can I find the schematic for MitySBC_Agilex5: Thank you, Mike.
I was asking about the schematic, because I don't have information about all the pins that are con... Eleonora Haralanova

08:14 PM MitySBC-Agilex5 FPGA Development: RE: Where can I find the schematic for MitySBC_Agilex5: Hello Eleonora,
To confirm, are you using the MitySBC hardware? If so then the three possible banks for PCIe x4 w... Michael Williamson
03:24 PM MitySBC-Agilex5 FPGA Development: Where can I find the schematic for MitySBC_Agilex5: Hello,
I'm trying to instantiate 3 PCIe Gen3 x4 lanes IPs in the FPGA but can't figure out which pins are available ... Eleonora Haralanova

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