Ethernet Interface for MitySOM-A5E
Added by Maxim Kanevsky about 6 hours ago
Hello Sir/Madame,
I'm trying to add GbE IF to MitySOM-A5E (version: A5ED-B64-144-SRC-X)
In the Dev. Kit document this is described in p.16.
The Interface SGMII connects to Bank-2A
When I'm trying to add EMAC to HPS, it allows me only RGMII for HPS and GMII for FPGA - no SGMII option.
Question: do you have some example design with GbE or how it suppose to work??
Thanks,
Max
Replies (1)
RE: Ethernet Interface for MitySOM-A5E - Added by Mike Fiorenza about 5 hours ago
Hi Max,
If you are trying to use the SGMII Ethernet interface that goes to J19 on the board then this will not work due to limitations with Engineering Silicon.
In order to hook this up you need to enable GMII for FPGA in the HPS for the EMAC then you need to add the Triple-Speed Ethernet IP and configure it with:
- Core variation = 1000Base-X/SGMII PCS Only
- Enable HPS GMII Adapter
- Transceiver Type = LVDS I/O
- PCS/Transceiver Options -> Enable SGMII bridge
This core will make the adaption from SGMII to GMII for the HPS. However, when you configure the IP above as such, you will get an error "Can only use LVDS TX channel with j factor 4". This is the error caused by Engineering Silicon which makes this not possible with the current hardware.
It should be possible to leverage the SFP port and connect it to the HPS EMAC, however we do not have an example design yet for doing this. Altera does and you could take a look at that here: https://github.com/altera-fpga/agilex5-ed-tsn-sgmii
For a temporary work around you can use a USB to Ethernet adapter or the USB3.0 port directly connected to a PC as shown here: https://support.criticallink.com/redmine/projects/mitysom_a5/wiki/USB-C_Interface
- Mike
