Example Projects¶
Below are the reference projects found in the following repository:
Type | Repo | Branch |
---|---|---|
Quartus Example Projects | git://support.criticallink.com/home/git/mitysbc-a5-ref.git | pro_24.2_stable |
mitysbc-a5e-ref-base¶
This is the base reference design project. It contains the minimum configuration for the HPS to boot Linux with USB support and USB console. The FPGA design contains a sys_id module and input/output PIOs that can be attached to misc IO on the development board. This is a good starting point to extend a design from.
mitysbc-a5e-ref-sdram¶
This is the base reference design project with the SDRAM port's Avalon Memory Mapped Agent exposed for access. This is a useful starting point if you need to access the HPS's RAM in your design. NOTE This project will not compile as is as the SDRAM interface is left unconnected for reference.
mitysbc-a5e-ref-fpga-emif¶
This is the base reference design project with the FPGA EMIF subsystem for reference. This is a useful starting point if you need to access the FPGA's RAM in your design.
mitysbc-a5e-ref-qsfp¶
This is the base reference design project with a QSFP+ subsystem for reference. This is a useful starting point if you need to use the QSFP+ peripheral in your design.
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