Development Board Interface Validation Status¶
The table below outlines the current test and validation status of the MitySOM-A5E SOM Development Kit Board.
Items marked as not validated are still being tested.
| Interface / Feature | Validated | Example Project | Notes |
|---|---|---|---|
| Console UART/USB Bridge | Yes | Any | |
| 1 Gbit Ethernet | Yes | Any | Bandwidth limitation due to Engineering Silicon |
| Display Port Output | Yes | TBS | Tested with 4K Resolution |
| SFP+ Interface | Yes | TBS | Tested using Intel's test packet generation logic (via PL) |
| JTAG Interface | Yes | Any | Programmed QSPI device at 16 MHz clock rate |
| USB Interface | Partial | Any | Tested in Host mode for enumeration. Peripheral Mode not yet tested. |
| FAN Drive | Yes | Any | |
| PCIe Interface | No | TBD | |
| MIPI Camera Interfaces | Partial | TBS | 7 Interfaces tested. CAM5 interface (in same bank as HPS EMIF) not usable in -1 Version. |
| SOM Power Monitor Interface | Yes | Any | |
| nCONFIG pushbutton | Yes | Any | |
| nRESET pushbutton | Yes | Any | |
| Debug LEDS | Yes | Any |
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