Mity CPU Platforms » MitySBC-Agilex5

03/03/2026

08:51 PM FPGA Development: RE: Where can I find the schematic for MitySBC_Agilex5

Hi Eleonora,
Are you trying to run EP or RP?
The GBTCLK0_M2C_P/N on FMC D4/D5 is run to REFCLK_GSTR4B_CH1p/n (A... Michael Williamson

08:26 PM FPGA Development: RE: Where can I find the schematic for MitySBC_Agilex5

Thank you, Mike.
I was asking about the schematic, because I don't have information about all the pins that are con... Eleonora Haralanova

03/02/2026

08:14 PM FPGA Development: RE: Where can I find the schematic for MitySBC_Agilex5

Hello Eleonora,
To confirm, are you using the MitySBC hardware? If so then the three possible banks for PCIe x4 w... Michael Williamson

03:24 PM FPGA Development: Where can I find the schematic for MitySBC_Agilex5

Hello,
I'm trying to instantiate 3 PCIe Gen3 x4 lanes IPs in the FPGA but can't figure out which pins are available ... Eleonora Haralanova

02/26/2026

02:58 PM Software Development: RE: Eclipse Application

Got it thank you!
Tom Thomas Catalino

02:52 PM Software Development: RE: Eclipse Application

This question was posted and answered on thread: https://support.criticallink.com/redmine/boards/72/topics/7175
If... Mike Fiorenza