Building the FPGA Image with Quartus Pro 21.3 20240205¶
1. Prerequisites 2. Building the FPGA Image 3. Building the Bootloader 4. Building the Filesystem 5. Building the SD Card
- Table of contents
- Building the FPGA Image with Quartus Pro 21.3 20240205
Introduction¶
The reference project to the MitySOM-A10S Development Kit utilizes GNU make for building the FPGA from the command line. Please note that the project can be built using the normal flow of Quartus/Platform Designer if that is desired.
These instructions have been tested with Quartus Pro 21.3
Tested host machine: Windows 10 Host running WSL2 and Ubuntu 22.04 LTS
Note: These instructions should also work with a standard/native linux machine running Ubuntu 22.04 LTS.
Information on installing Windows Subsystem for Linux 2
Repository¶
Description | Repository | Branch |
Quartus Reference Project | git://git.criticallink.com/home/git/mitysom-a10s.git | 21.3pro-stable |
Reference Projects¶
Path | Description |
mitysom-a10s-devkit-goldenref | MitySOM-A10S Golden Reference Design |
Development Kit Pre-built Outputs¶
Description | Link |
270 KLE FPGA Images | a10s-p8-fpga-20240205.zip |
480 KLE FPGA Images | a10s-p9-fpga-20240205.zip |
Quick steps to Build (Windows + WSL2)¶
- From the Windows Start Menu, select Intel FPGA Quartus Pro 21.3 -> NIOS II Command Shell. This will start a WSL2 linux prompt with the path set to include the quartus tools.
- Change to the directory to start the project.
cd /mnt/d/projects
- Fetch the reference project from the Critical Link Support Site:
git clone -b 21.3pro-stable git://support.criticallink.com/home/git/mitysom-a10s.git
- Change into the directory where project was cloned into (Example: /home/user/mitysom-a10s)
cd mitysom-a10s/mitysom-a10s-devkit-goldenref
- Run the following command that will do the following:
- Generate the qsys
- Compile the FPGA
- Convert the SOF to an RBF
make rbf
Quick steps to Build (Native Linux)¶
- Open a terminal
- Enter the following command that will allow you to use the quartus tools from the command line:
/opt/intelFPGA_pro/21.3/nios2eds/nios2_command_shell.sh
- Change into the directory where project was cloned into (Example: /home/user/mitysom-a10s)
cd /home/user/mitysom-a10s/mitysom-a10s-devkit-goldenref
- Run the following command that will do the following:
- Generate the qsys
- Compile the FPGA
- Convert the SOF to an RBF
make rbf
Updating Reference Project to Build for the 480 KLE¶
The reference project can either build for the 270 KLE SOM or the 480 KLE SOM. To do this the QUARTUS_DEVICE variable in the Makefile will need to match the SOM to build for. After changing the QUARTUS_DEVICE the Quartus project files will need to be recreated from the TCL scripts that are in the project directory.
Warning: Changing the device with the Makefile will lose any changes done to the reference project!
Support SOMs:SOM Model Number | FPGA Device |
A10S-P8-A5E-RI-SB | 10AS027E3F29I2SG |
A10S-P8-X5E-RC-SA | 10AS027E3F29I2SG |
A10S-P8-X5E-RI-SA | 10AS027E3F29I2SG |
A10S-P9-A5E-RI-SB | 10AS048E3F29I2SG |
A10S-P9-A5E-RC-SB | 10AS048E3F29I2SG |
A10S-P9-X5E-RC-SA | 10AS048E3F29I2SG |
A10S-P9-X5E-RI-SA | 10AS048E3F29I2SG |
To change to the build for the 480 KLE SOM:
- Open a terminal as described in the "Quick Steps to Build" Section
- Open the Makefile in a text editor
gedit Makefile
- Comment out QUARTUS_DEVICE := 10AS027E3F29I2SG and uncomment QUARTUS_DEVICE := 10AS048E3F29I2SG
- QUARTUS_DEVICE := 10AS027E3F29I2SG + #QUARTUS_DEVICE := 10AS027E3F29I2SG - #QUARTUS_DEVICE := 10AS048E3F29I2SG + QUARTUS_DEVICE := 10AS048E3F29I2SG
- Save and close the text editor
- Back in the terminal regenerate the project files: Warning: All changes will be lost in the Quartus Project/QSYS
make generate_from_tcl
- Build the project like normal:
make rbf
Updating the Pinout¶
The pin constraints for the project are generated from the edge_connector_pinout.xlsm(Excel) or edge_connector_pinout.ods(LibreOffice) spreadsheet. This spreadsheet has macros built in that will generate tcl pin constraint files that the qsf includes.
There are 6 sheets inside the spreadsheet document: SOM J4, SOM J600, Gen 1 Dev Kit FMC, Gen 2 Dev Kit FMC, SOM Only, and IO Standards. The idea is that the user will fill in the Baseboard Net and IO Standard for pins that are used on their baseboard. Once that is filled in, click the Generate Pinout button on each page. This will create the tcl script with the appropriate pin location selected.
Sheet | Description |
SOM J4 | Large Samtec board to board connector on the SOM |
SOM J600 | Transceiver board to board connector on the SOM |
Gen 1 Dev Kit FMC | 1st Generation Dev kit FMC pinout, for FMC pinout use this sheet instead of J (80-0001201) |
Gen 2 Dev Kit FMC | 2nd Generation Dev kit FMC pinout, for FMC pinout use this sheet instead of J (80-0001218) |
SOM Only | Connections that don't leave the SOM (ie DDR) |
IO Standards | List of IO Standards that can be used |
Opening Platform Designer and Quartus¶
The Makefile can also be used open Quartus or Platform designer.
Opening Quartus:
- Open a terminal as described in the "Quick Steps to Build" Section
- Open the current project with Quartus with the Makefile
make quartus_edit
Opening Platform Designer:
- Open a terminal as described in the "Quick Steps to Build" Section
- Open the current project's top level qsys with Platform Designer with the Makefile
make qsys_edit
Further Reading¶
- Arria 10 HPS Technical Reference Manual
- Intel's Embedded IP Reference Manual
- Arria 10 Transceiver Reference Manual
- Intel Quartus Design Suite
1. Prerequisites 2. Building the FPGA Image 3. Building the Bootloader 4. Building the Filesystem 5. Building the SD Card
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