Memory Bandwidth¶

The information provided is intended to provide understanding on how the different memory configurations affect memory bandwidth.

All of the data supplied on this webpage had been collected on the MitySOM-AM62x development kit with a 6254-TX-X9E-RC SOM.

Memory Configurations¶

• -40C to 85C Operating Temperature Range (85C) (base case):
• -40C to 95C Operating Temperature Range (95C):
• -40C to 85C Operating Temperature Range with ECC enabled (85C ECC):
• -40C to 95C Operating Temperature Range with ECC enabled (95C ECC):

Above configs were run with LPASR mode "Manual mode, Normal temp" and TCR mode "Disabled" in TI's sysconfig tool.

Operating temperature range needs to be changed for the DDR4 if the DDR's temperature is going to exceed 85C. This value is set in TI's sysconfig DDR tool and affects the memories refresh rate. The refresh rate is doubled which can effect memory bandwidth.

Note: In our testing the DDR case temperature was ~10C above ambient during stress tests. If you plan to run the SOM in environments approaching 70C, we recommend you do your own stress testing to ensure parts don't exceed their max temperatures and continue to operate correctly. Currently the max internal memory temperature for the RAM is 95C for commercial and industrial parts, but may be different depending on model. Passive or active heatsinks may be required, see Power Supply and Heat Dissipation

Enabling DDRSS ECC

TODO: talk about LPASR and TCR mode

Results¶

Highest memory bandwidth was with -40 to 85C Operating Temperature Range (85C) (base case)

• Memory Bandwidth Test Percent Difference between 85C and other configurations

  Memory Configuration	Percent Difference
  85C	0.0%
  95C	-8.9%
  85C ECC	-31.3%
  95C ECC	-39.5%

• Average change in performance between all benchmarks

  Memory Configuration	Percent Change
  85C	0.0%
  95C	-3.31%
  85C ECC	-17.33%
  95C ECC	-20.18%

Note: 95C and ECC modes are additive.
Note: Several tests conducted appear to be somewhat CPU bound rather than memory bound. Or at least aren't as affected by the additional time spend refreshing memory cells.

Test setup¶

Tests were conducted on the same SOM.

Memory bandwidth and latency was measured using tinymembench. Tinymembench is a simple memory benchmark program, which tries to measure the peak bandwidth of sequential memory accesses and the latency of random memory accesses. Bandwidth is measured by running different assembly code for the aligned memory blocks and attempting different prefetch strategies.

For each memory configuration tinymembench was ran three times. The results of each test were then averaged together and used to calculate the percent difference between the base case (85C) and the other memory configurations.

Navigating The Outputs:¶

tinymembench results output: Tinymembench_Results.xlsx
Raw tinymembench result logs: Tinymembench_Results.txt

The Tinymembench_Results.xlsx contains 5 total sheets

• Sheet1: 85C (base case)
  • Memory Bandwith and Latency Test
    • Conducted over three trials, with the average calculated
• Sheet2: 95C
  • Memory Bandwith and Latency Test
    • Conducted over three trials, with the average calculated
• Sheet3: 85C ECC
  • Memory Bandwith and Latency Test
    • Conducted over three trials, with the average calculated
• Sheet4: 95C ECC
  • Memory Bandwith and Latency Test
    • Conducted over three trials, with the average calculated
• Sheet5: Summary
  • Contains the percent difference between 85C and the other 3 tests for both memory bandwidth and latency tests